Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Yield
Reexamination Certificate
2007-06-27
2011-10-11
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
Yield
Reexamination Certificate
active
08037430
ABSTRACT:
One inventive aspect relates to a method of determining an estimate of system-level yield loss for an electronic system comprising individual components subject to manufacturing process variability leading to manufacturing defects. The method comprises obtaining a description of the composition of the electronic system in terms of which individual components are used. The method further comprises obtaining statistical properties of the performance of individual components of the electronic system with respect to first and second performance variables, e.g. energy consumption and delay, the statistical properties including correlation information of the first and second performance variables. The method further comprises obtaining information about execution of an application on the system, e.g. a number of accesses of a component by an application. The method further comprises propagating the statistical properties of the first and second performance variables of the individual components to the electronic system so that the correlations between the first and second performance variables are preserved, the propagating taking into account the application information.
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Miranda Miguel
Papanikolaou Antonis
Roussel Philippe
IMEC
Knobbe Martens Olson & Bear LLP
Siek Vuthe
LandOfFree
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