Method for etching high-k films in solutions comprising...

Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching

Reexamination Certificate

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C438S689000

Reexamination Certificate

active

06835667

ABSTRACT:

FIELD OF INVENTION
This invention relates to the etching of thin films during the production of devices such as integrated circuits, and more particularly, to the use of solutions containing very dilute fluoride species to etch high-k materials.
BACKGROUND OF INVENTION
Most integrated circuits currently produced are manufactured on thin disks of silicon and/or other semiconductor material (wafers) using “complementary metal oxide semiconductor” (CMOS) technology. A general discussion of CMOS technology can be found in “Silicon Processing for the VLSI Era, Volume 2—Process Integration” by Wolf et al., Lattice Press, 298-367, (1990). In a CMOS circuit, an electric potential applied to a transistor's gate electrode capacitively couples to its channel and controls the current that flows between its source and drain electrodes. The gate electrode is electrically insulated from the channel by the gate dielectric. The gate dielectric has historically utilized SiO
2
formed by thermally oxidizing the silicon above the channel. SiO
2
dielectrics have many advantages, including their ability to be removed by etching in either gas, plasma or liquid based processes.
The electrical properties of the transistor depend to a significant degree upon the nature of the gate dielectric. In particular, reducing the thickness of the dielectric increases the capacitive coupling between the gate and channel, allowing higher speed transistor operation at lower operating voltages. But, as the thickness of the dielectric is reduced much below about 2 nm, quantum tunneling effects tend to increase, allowing an electric current to flow between the gate and channel. This tunneling current is undesirable as it increases the transistor's power requirements and causes undue heat generation.
Excessive tunneling can be alleviated if the capacitive coupling between the gate and channel is increased by increasing the dielectric constant (k) of a fixed “physical” thickness of gate dielectric, t
phys
. The equivalent “electrical thickness,” t
elect
, of a high-k gate dielectric is approximately equal to the gate's physical thickness times the ratio of the dielectric constants of SiO
2
and the high-k material, k
SiO2
and k
high-k
, respectively. That is:
t
elect
=t
phys
*(
k
SiO2
/k
high-k
)
Early approaches to increasing k included “nitriding” the SiO
2
, forming silicon oxy-nitrides (SiO
x
N
y
) of various stoichiometries. Recent work evaluating the electrical, metallurgical and chemical properties of various dielectric materials has focused upon the unary oxides of aluminum, zirconium and hafnium, mixtures of these oxides, and silicates of these elements or mixtures. A general discussion on the need for high-k dielectrics can be found in “High-k Gate Dielectric Materials,” by R. M. Wallace et al., MRS Bulletin, 27 (3), 192-197, (2002). A general discussion on the selection process that leads to particular metal oxides can be found in “A Thermodynamic Approach to Selecting Alternative Gate Dielectrics,” by D. G. Schlom, MRS Bulletin, 27 (3), 198-204, (2002).
A subtractive process for producing patterned dielectric features on semiconductor wafers involves depositing a film of high-k material on the wafer, and then etching the film away in areas where it is not desired. While SiO
2
is easily etched, the above mentioned high-k materials are highly resistant to chemical attack. Concentrated hydrofluoric acid is the only commonly used etchant for these high-k materials. HF is used, for instance, to reclaim wafers used to test a high-k film deposition process by removing the entire film, allowing their reuse in subsequent tests. In etch testing to date, high-k films that have been annealed (subject to a thermal treatment typical of the CMOS production process) typically etch much more slowly than “as deposited” films.
Unfortunately, concentrated HF also has a high etch rate on other silicon-based oxides such as SiO
2
formed by thermal oxidation (Tox) of silicon, SiO
2
formed by deposition from gas-phase tetraethylorthosilicate and oxygen or ozone (TEOS), and TEOS doped with boron and/or phosphorous (BPTEOS, BTEOS, PTEOS). This means that conventional aqueous HF solutions previously have not been practically useful for selectively etching high-k films relative to silicon oxide materials. Features formed from these silicon oxides are critical to the circuit's operation and are often necessarily present on the wafer when a high-k film is etched away. If high-k films are to be commercially viable, it is highly desired that an etching chemistry be found that can selectively etch a high-k film, with little or no etch of the other films present. Etch selectivities of at least about 1:1, more preferably greater than about 3:1, and more preferably greater than about 5:1 are desired. Silicon oxides typically etch faster than these high-k films in concentrated HF, with selectivities of high-k film to silicon oxide being in a range from 1:10 to even 1:100.
The situation is somewhat similar to that of selectively etching silicon nitride (Si
3
N
4
) in the presence of SiO
2
. Deckert initially investigated selective etching of Si
3
N
4
in aqueous fluoride media, but was unable to achieve the desired etch selectivities (C. A. Deckert, “Etching of CVD Si
3
N
4
in Acidic Fluoride Media,” J. Electrochemical Soc., 125 (2), 320-323 (1978)). Deckert then pursued etching in HF/organic solvent mixtures and was able to achieve a 2.5:1 selectivity with 2 wt % HF in glycerol at 110° C. (C. A. Deckert, “Pattern Etching of CVD Si
3
N
4
/SiO
2
Composites in HF/Glycerol Mixtures,” J. Electrochemical Soc., 127 (11), 233-2438 (1980) and U.S. Pat. No. 4,269,654 to Deckart). U.S. Pat. No. 4,269,654 also noted that 2 wt % HF in water at 96° C. gave a very poor, 1:4.5 etch selectivity of Si
3
N
4
to SiO
2
. Jagannathan and Rath later used HF/organic mixtures for the selective removal of SiO
2
without attack of coexisting metals (U.S. Pat. No. 6,200,891 to Jagannathan and U.S. Pat. No. 6,254,796 to Rath). Itano et al. has demonstrated the selective etching of unannealed HfSiO
x
and ZrAlO
x
films over thermally grown SiO
2
in mixtures of HF in a low dielectric constant solvent (for example, isopropyl alcohol, acetic acid, tetrahydrofuran, methanol or ethanol), (M. Itano et al., “Selective and Non-Selective Wet Etching by Low-Relative Dielectric Constant Solvent Containing Fluorine Compound,” presented at the International Sematech Wafer Clean and Surface Preparation Workshop, May 21, 2002, Sematech International, Austin, Tex.).
The chemistry of aqueous HF solutions and its etch mechanisms have been investigated by Verhaverbeke and Knotter (S. Verhaverbeke et al., “The Etching Mechanisms of SiO
2
in Hydrofluoric Acid,” J. Electrochemical Soc., 141 (10), 2852-2852, (1994); D. Martin Knotter, “Etching Mechanisms of Vitreous Silicon Dioxide in HF-Based Solutions,” J. Am. Chem. Soc., 122 (18), 4345-4351, (2000)). Verhaverbeke and Knotter noted that the concentration of the various ionic species in aqueous HF (e.g., HF, HF
2

, H
2
F
2
, H
+
, F

) vary with HF concentration, ascribing the etching of SiO
2
to HF
2

and H
2
F
2
. Knotter (2001) further investigated the etching mechanisms of Si
3
N
4
in aqueous HF.
U.S. Pat. No. 5,382,296 to Anttila notes that aqueous HF concentrations of 0.000049 wt % to 0.049 wt % can be used near ambient temperature to clean “particles . . . as well as metallic and organic contamination” where the equivalent thickness of the metallic film is approximately 10
−6
A (Angstrom=10
−10
meter), far below one monolayer of film coverage. U.S. Pat. No. 6,300,202 to Hobbs notes that “metal oxide dielectrics are not readily susceptible to wet etch processing” and proposes removing the metal-oxides by first reducing the metal-oxides to metals by annealing in a low-oxygen or hydrogen-rich environment, followed by etching the metallic metals with a wet or dry etch.
In recently published work, Chambers tested the etching of unannealed and annealed film

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