Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-06-29
2003-08-26
Niebling, John F. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06611951
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to design tools for integrated circuits. More specifically, but without limitation thereto, the present invention relates to a method for estimating the number of transit connections that may be routed through a hard macro of an integrated circuit.
Integrated circuits typically include blocks or partitions of multiple circuit elements called hard macros or “hardmacs”. Each hardmac is a generally rectangular cell that may be a complex hierarchical module containing several smaller modules. Connections made between hardmacs that pass through an intervening hardmac are called transit connections. The number of available transit connections, i.e., the total number of connections of a hardmac minus those connections used internally by the hardmac is termed the porosity of the hardmac. The absolute porosity is the number of transit connections that can be made through a hardmac in either the vertical or the horizontal direction. The relative porosity is the ratio of the absolute porosity to the maximum number of transit connections that can be made through an empty cell having the same size as the hardmac. The porosity of each hardmac in an integrated circuit chip design is useful information for logic design tools that design routable floorplans. Disadvantageously, porosity information is generally not available from hardmac cell libraries, and may be costly to generate.
SUMMARY OF THE INVENTION
The present invention advantageously addresses the problems above as well as other problems by providing a method of estimating the number of available transit connections, or porosity, of a hardmac.
In one embodiment, the present invention may be characterized as a method of estimating horizontal and vertical porosity of a hardmac that includes the steps of (a) calculating a total layer capacity of the hardmac; (b) calculating a number of available transit connections from the total layer capacity; (c) estimating a number of transit connections used for internal routing; (d) calculating an absolute porosity of the hardmac from the number of available transit connections and the number of transit connections used for internal routing; (e) calculating a relative porosity of the hardmac from the total metal layer capacity and the absolute porosity; and (f) generating as output the relative porosity of the hardmac as an estimated porosity.
In another embodiment, the present invention may be characterized as a method of estimating horizontal and vertical porosity of a hardmac that includes the steps of (a) calculating a total layer capacity of the hardmac; (b) calculating a number of available transit connections from the total layer capacity; (c) estimating a number of transit connections used for internal routing; (d) calculating an absolute porosity of the hardmac from the number of available transit connections and the number of transit connections used for internal routing; (e) calculating a relative porosity of the hardmac from the total metal layer capacity and the absolute porosity;(f) generating as output the relative porosity of the hardmac as an estimated porosity; and adjusting a coefficient to vary the estimated porosity generated as output in step (e) such that the estimated porosity has a maximum value for which the hardmac may be routed by a place and route tool.
In a further embodiment, the present invention may be characterized as a computer program product for estimating the porosity of a hardmac that includes a medium for embodying a computer program for input to a computer and a computer program embodied in the medium for causing the computer to perform the following functions: (a) calculating a total layer capacity of the hardmac; (b) calculating a number of available transit connections from the total layer capacity; (c) estimating a number of transit connections used for internal routing; (d) calculating an absolute porosity of the hardmac from the number of available transit connections and the number of transit connections used for internal routing; (e) calculating a relative porosity of the hardmac from the total metal layer capacity and the absolute porosity; and (f) generating as output the relative porosity of the hardmac as an estimated porosity.
REFERENCES:
patent: 6405358 (2002-06-01), Nuber
Hom, I, et al., “Estimation of the number of routing layers and total wirelength in a PCB through distribution analysis”, IEEE, Sep. 1996, pp. 310-315.
Berdichevsky Yevgeny
Tetelbaum Alexander
Fitch Even Tabin & Flannery
LSI Logic Corporation
Niebling John F.
Whitmore Stacy A
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