Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-04-17
2007-04-17
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S014000, C716S030000
Reexamination Certificate
active
11036822
ABSTRACT:
A method is provided for selecting a frequency-based ramptime limit for a technology. The method includes creating a logic chain with cells from the technology and applying a sequence of signals to the logic chain. Each signal has a different ramptime relative to a clock period. At least one signal quality characteristic is measured along the logic chain for each of the signals. The frequency-based ramptime limit is selected based on a comparison of the measured signal quality characteristics measured to at least one predefined signal quality value.
REFERENCES:
patent: 5754812 (1998-05-01), Favor et al.
Chan Chun
Cui Qian
Do Thuan
LSI Logic Corporation
Westman Champlin & Kelly P.A.
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