Method for error control in multilevel cells with...

Details Method for error control in multilevel cells with... Method for error control in multilevel cells with...

2006-03-21

2006-03-21

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

07017099

ABSTRACT:
A method for error control in multilevel memory cells storing a configurable number of bits. The error control is performed using an error-control code which operates, in the encoding phase, on b-bit binary strings made up of k symbols of r-bit data. When the memory cells store a number r of bits, a data symbol is formed only with the data bits stored in a memory cell. When the memory cells store a number s of bits smaller than r, a data symbol is formed with the data bits stored in a memory cell and with r-s bits having a pre-determined logic value, in which the data bits stored in the memory cell are arranged in the least significant part of the data symbol, and the r-s bits having a pre-determined logic value are arranged in the most significant part of the data symbol.

REFERENCES:
patent: 5754566 (1998-05-01), Christopherson et al.
patent: 5969985 (1999-10-01), Tanaka et al.

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