Method for erasing data stored in a non-volatile semiconductor m

Details Method for erasing data stored in a non-volatile semiconductor m Method for erasing data stored in a non-volatile semiconductor m

1992-04-09

1994-11-01

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Erase

365185, G11C 700

Patent

active

053612353

ABSTRACT:
A method for erasing data stored in a non-volatile semiconductor memory is applied to a memory cell transistor including a p-type well region, a source and a drain formed within the p-type well region, and a composite gate including a floating gate electrode formed on the p-type well region. In the method, a plurality of pulses having a high positive voltage is applied to the p-type well region so that a product (I.times.N) of a pulse interval (I) and a number of the plurality of pulses (N) becomes not smaller than 0.1 s on condition that the control gate electrode is fixed to the ground level and the source and drain are kept at a floating state.

REFERENCES:
patent: 4279024 (1981-07-01), Schrenk
patent: 4384349 (1983-05-01), McElroy
patent: 4435785 (1984-03-01), Chapman
patent: 5043940 (1991-08-01), Harari
patent: 5095344 (1992-03-01), Harari
patent: 5122985 (1992-06-01), Santin

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