Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2001-11-30
2003-06-17
Chen, Kin-Chan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S723000, C438S724000
Reexamination Certificate
active
06579801
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to methods of fabricating substrate trenches and isolation structures therein.
2. Description of the Related Art
The implementation of integrated circuits involves connecting isolated circuit devices through specific electrical pathways. Where integrated circuits are implemented in silicon, it is necessary, therefore, to initially isolate the various circuit devices built into the silicon substrate from one another. The circuit devices are thereafter interconnected to create specific circuit configurations through the use of global interconnect or metallization layers and local interconnect layers.
Local oxidation of silicon (“LOCOS”) and trench and refill isolation represent two heavily used isolation techniques for both bipolar and metal oxide semiconductor (“MOS”) circuits. In a conventional semi-recessed LOCOS process, a thin pad oxide layer is thermally grown on a silicon substrate surface and coated with a layer of chemical vapor deposition (“CVD”) silicon nitride. The active regions of the substrate are then defined with a photolithographic step. The nitride layer is then dry etched and the pad oxide layer wet or dry etched with the photoresist left in place to serve as a masking layer for a subsequent channel stop implant. After the channel stop implant, field oxide regions are thermally grown by means of a wet oxidation step. The oxidation of the silicon proceeds both vertically into the substrate and laterally under the edges of the nitride layer, resulting in the formation of structures commonly known as bird's beaks.
The formation of bird's beak structures is problematic in a number of ways. To begin with, bird's beak formation can create significant limitations on the packing density of devices in an integrated circuit. Design rules for LOCOS processes must restrict the gaps between adjacent devices to account for the lateral encroachment of bird's beaks. In addition, the very shape of a bird's beak can result in the exposure of the substrate surface during subsequent overetching to open contacts for metallization. This can result in the source of the transistor becoming shorted to the well region when the metal interconnect film is deposited. This problem may be particularly acute in CMOS circuits where shallower junctions are used, due to the higher propensity for the exposure of the well regions. While some improvement in the formation of bird's beak structures has occurred as a result of the introduction of techniques such as the etchback of portions of the field oxide structures, deposition of a silicon nitride layer without a pad oxide layer, and use of a thin pad oxide covered with polysilicon, the difficulties associated with bird's beak formation have not been completely eliminated.
In trench-based isolation structures, a damascene process is used to pattern and etch a plurality of trenches in the silicon substrate. The trenches are then provided with an oxide liner and then filled with a CVD silicon dioxide or doped glass layer that is planarized back to the substrate surface using etchback planarization or chemical mechanical polishing (“CMP”). Although conventional trench and refill isolation techniques eliminate the difficulties associated with bird's beak formation in LOCOS processes, there are nevertheless difficulties associated with the trench and refill isolation techniques.
One potential disadvantage associated with the conventional trench process just described is the lateral encroachment of the liner oxide layer into active device regions on either side of the trench. This can lead to reductions in the maximum drive current for devices formed in the active regions. Another potential pitfall is the possibility of unwanted etch attack of the substrate in the vicinity of the upper corners of the trench during subsequent removal of the protective layers formed on the substrate prior to trench etch. Normally an oxide
itride stack is formed on the substrate prior to trench etch to provide hard masking of the substrate. These layers are typically removed following refill and planarization. In conventional processing, the upper corners of the trench are positioned beneath the edges of the silicon nitride film and the pad oxide film. As a consequence, the bulk refill material will not cover and protect the trench corners. The liner oxide layer at the corners can be easily compromised, producing an unwanted etch attack of the substrate proximate the corners. Stringers of conducting material may form in the dished regions and lead to shorts between devices.
Another potential shortcoming of the conventional process is the limitation on trench corner rounding. In the conventional trench formation process, the silicon trench corner is present directly under the pad oxide
itride following trench etch. Thus, any subsequent trench liner oxidation process cannot easily oxidize the silicon in the corner region since the pad oxide
itride acts as a diffusion barrier. This reduces the ability of the liner oxide to provide adequate trench corner rounding, which is necessary for robust operation of a subsequently formed device. The trench corners define the extremities of the active device, such as a transistor, along a perpendicularly formed gate, and sharp corners translate into higher fields in the source/drain at these locations, leading to a possibility of premature junction breakdown and higher leakage. Sharp corners also result in higher mechanical stresses when thermal oxides are gown, and may give rise to stress-relieving dislocations in the substrate material, which can lead to junction shorts by the formation of diffusion pipes.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of fabricating a trench in a substrate is provided. An oxide film is formed on the substrate and a silicon nitride film is formed on the oxide film. An opening with opposing sidewalls is etched in the silicon nitride film with a plasma until a first portion of the oxide film is exposed while second and third portions of the oxide film positioned on opposite sides of the first portion of the oxide film remain covered by first and second portions of the silicon nitride film that project inwardly from the opposing sidewalls. The oxide film is etched for a selected time period in order to expose a portion of the substrate. The first and second portions of the silicon nitride film protect the second and third portions of the oxide film whereby first and second oxide
itride ledges are defined that project inwardly from the opposing sidewalls. The substrate is etched to form the trench. The first and second oxide
itride ledges protect underlying portions of the substrate whereby the trench forms with opposing shoulders projecting inwardly from the respective opposing sidewalls of the silicon nitride film.
In accordance with another aspect of the present invention, a method of fabricating an isolation structure on a substrate is provided. An oxide film is formed on the substrate and a silicon nitride film is formed on the oxide film. An opening with opposing sidewalls is etched in the silicon nitride film with a plasma until a first portion of the oxide film is exposed while second and third portions of the oxide film positioned on opposite sides of the first portion of the oxide film remain covered by first and second portions of the silicon nitride film that project inwardly from the opposing sidewalls. The oxide film is etched for a selected time period in order to expose a portion of the substrate. The first and second portions of the silicon nitride film protect the second and third portions of the oxide film whereby first and second oxide
itride ledges are defined that project inwardly from the opposing sidewalls. The substrate is etched to form t
Dakshina-Murthy Srikanteswara
Haines Jeffrey C.
Schwan Christoph
Advanced Micro Devices , Inc.
Chen Kin-Chan
Honeycutt Timothy M.
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