Method for enhancing data transmission in parity based data proc

Details Method for enhancing data transmission in parity based data proc Method for enhancing data transmission in parity based data proc

1997-01-08

1999-07-27

Chung, Phung My

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

714712, 714798, 714799, G06F 1110, H03M 1300

Patent

active

059283750

ABSTRACT:
A data transfer system providing parity uses a method and apparatus for transmitting a data clocking signal in a parity bit location along a data bus to latch an accompanying data byte at a receiving device. A transmitting device, coupled to the receiving device through the data bus, generates a data clock signal and latches the clock signal into the parity bit location of the data bus. The clock signal and data byte are then transmitted along the data bus to the receiving device. The receiving device uses the clock signal to latch the data byte from the data bus. Thus, the data transfer system uses the data clock signal transmitted in the parity bit location of the data bus to validate and synchronize the accompanying data byte at the receiving device.

REFERENCES:
patent: 5155735 (1992-10-01), Nash et al.
patent: 5257391 (1993-10-01), DuLac et al.
patent: 5461701 (1995-10-01), Voth

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