Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1998-12-30
2001-10-30
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S701000, C714S761000, C714S762000
Reexamination Certificate
active
06311304
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for encoding/decoding of digital data, and more particularly to a method, in a digital-video home system (D-VHS), for the encoding/decoding of digital data by utilizing data shuffling.
2. Description of the Prior Art
In a magnetic and optic recording system such as a digital phone, a digital video cassette recorder and a digital compact disc, scratches or fine dust results in frequent occurrences of burst errors having a long error length or partially concentrated errors.
In a system having a high possibility for burst error, a Reed-Solomon (RS) coding method has been widely used and recognized as a powerful error correcting code. According to this coding method, before transmission or recording of digital data, outer parity information and inner parity information generated by an RS coder are added to the digital data. The added outer parity information and inner parity information effectively serve as a powerful tool to correct errors occurring during transmission or recording of digital data upon receipt of data or upon reproduction of data by an RS decoder.
Data shuffling has also been used to provide more powerful error correction. Generally, shuffling means a method of scrambling digital data in a time axis upon recording the digital data onto a recording material such as a magnetic tape. As a prior art relating to a shuffling of digital data, U.S. Pat. No. 5,301,018, entitled ‘METHOD AND APPARATUS FOR SHUFFLING IMAGE DATA INTO STATISTICALLY AVERAGED DATA GROUPS AND FOR RESHUFFLING THE DATA’, issued to Peter Smith and two other inventors, was disclosed. In accordance with this art, to equalize the information content of the data prior to compression, the video image is divided into a plurality of image representing blocks and a predetermined number of the image blocks from different spatial locations in the image to form a succession of data sets representative of the video image information. There are various prior arts relating to data shuffling, including U.S. Pat. No. 5,321,748, entitled ‘METHOD AND APPARATUS FOR TELEVISION SIGNAL SCRAMBLING USING BLOCK SHUFFLING’, issued to David E. Zeidler and John T. Griffin.
However, these prior arts do not disclose a coding technique based on the D-VHS. The D-VHS is a new digital data recording art based on a video home format where compressed information such as digital broadcasting data can be recorded. A technical specification of the D-VHS was mainly prepared by the JVC company of Japan in 1995. The D-VHS is a bit stream recording/reproducing apparatus where compressed or processed digital data is recorded directly in a tape without additional processing of data and is reproduced from the tape. A bit stream recording unit does not integrate functions of analog/digital conversion, digital/analog conversion, digital compression/decompression, or descrambling.
Consequently, to accomplish a purpose of improving an error correcting ability in the D-VHS, a new data coding/decoding method is required. For this, a method employing data shuffling during producing of inner parity information and outer parity information by the RS coding can be considered. In other words, the shuffling and the RS coding are coupled during a recording of digital data onto a magnetic tape, so that the method creates parity information for error correction corresponding to a predetermined size of data read in a scrambled time order from a memory in which the data are sequentially stored, and stores the parity information so as to be related with the data before being recorded onto the magnetic tape. The method of data shuffling distributes burst errors, so that error correction becomes easy.
SUMMARY OF THE INVENTION
Therefore, the present invention is invented to solve the above problems of the prior arts, and an object of the present invention is to provide a method for error correction coding and decoding that, upon encoding and decoding digital data in the D-VHS, shuffles sync blocks based on RS codes after calculating a track number and a sync block number by using a predetermined shuffling algorithm.
To accomplish the object, a digital data supplied as a bit stream into the D-VHS is encoded by a method that comprises the steps of:
(A) adding outer parity information to a main data of the digital data by: i) storing the main data constituting a frame to which a track number and a sync block number are designated in a storing means, wherein the frame includes 18 ECC blocks and each ECC block includes 102 sync blocks; ii) setting values of parameters t, g, s and VSB as 0, wherein the parameters t, g, s, and VSB respectively represent a number for tracks constituting the frame, a number for logical ECC blocks belonging to a track, a number for bytes of data constituting a vertical sync block within the ECC block, and a number for the vertical sync blocks constituting a ECC block; iii) calculating a track number TR and a sync block number SB by using equation (1), which is TR=[t+(s×5)] mod 6 and SB=g+s×3, while increasing a value of the parameter s by 1 from 0 to 101 and forming a vertical sync block by shuffle-reading by the byte the main data from a sync block which corresponds to the calculated track number TR and sync block number SB; iv) producing a predetermined byte of the outer parity information for error correction by using a predetermined polynomial with respect to the vertical sync block, and shuffle-writing by the byte the outer parity information at a location of the track number TR and the sync block number SB, which are calculated from the equation (1), in the storing means, while increasing a value of the parameter s by 1 from 102 to 111; v) performing recursively substeps iii) and iv) while increasing a value of the parameter VSB by 1 from 0 to 98 and resetting the parameter s as 0 at every increment; vi) performing recursively steps iii), iv) and v) while increasing a value of the parameter g by 1 from 0 to 2 and resetting the parameters s and VSB as 0 at every increment; and vii) performing recursively the substeps iii), iv), v) and vi) while increasing a value of the parameter t by 1 from 0 to 5 and resetting the parameters s, VSB and g as 0 at every increment, wherein the outer parity information with respect to the main data of one frame is produced by shuffling through substeps i) to vii), and the produced outer parity information is written in the storing means by shuffling; and
(B) adding inner parity information to the main data and the outer parity information of the digital data by: a) setting values of parameters t, g, P, and HSB as 0, wherein the parameters P and HSB respectively represent a number for bytes of a sync block of the main data and the outer parity information and a number for horizontal sync blocks belonging to the ECC block of the main data and the outer parity information; b) calculating a track number TR and a sync block number SB by using equation (2), which is TR=[t+(HSB×5)] mod
6
and SB=g+HSB×3, while increasing a value of the parameter P by 1 from 0 to 98 and forming a horizontal sync block by reading by the byte the main data and the outer parity information from a sync block which corresponds to the calculated track number TR and sync block number SB; c) producing a predetermined byte of the inner parity information for error correction of the horizontal sync block by using a predetermined polynomial, and writing the outer parity information by the byte at a location of the track number TR and the sync block number SB, which are calculated from equation (2), in the storing means, while increasing a value of the parameter P by 1 from 99 to 106; d) performing recursively substeps b) and c) while increasing a value of the parameter HSB by 1 from 0 to 111 and resetting the parameter P as 0 at every increment; e) performing recursively substeps b), c) and d) while increasing a value of the parameter g by 1 from 0 to 2 a
Daewoo Electronics Co. Ltd.
De'cady Albert
Pillsbury & Winthrop LLP
Torres Joseph
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