Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1998-06-25
2000-04-25
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438622, 438624, 438626, 438627, 438629, 438631, 438643, 438645, 438648, 438653, 438656, 438666, H01L 214763
Patent
active
060543787
ABSTRACT:
Disclosed is a method for encapsulating a via over a first metal layer of a semiconductor substrate in a damascene processing to prevent voiding. The method includes forming an intermetal oxide (IMO) layer over the first metal layer and forming a via in the IMO layer such that the via exposes a portion of the first metal layer and a side wall of the via in the IMO layer. The method also includes conformally forming a first barrier layer over the IMO layer and the via such that a portion of the first barrier layer is deposited over the side wall of the IMO layer and the exposed portion of the first metal layer. The method further includes depositing a second metal layer over the first barrier layer such that the second metal layer fills the via within the first barrier layer portion deposited in the via to form a metal via. Additionally, the method includes removing the second metal layer and the first barrier layer above a top portion of the IMO layer and forming a trench in a portion of the IMO layer in contact with the first barrier layer to a specified depth. The method further includes forming a second barrier layer in the trench. The method also forming a third metal layer over the second barrier layer in the trench to form a metal trench such that the metal via is encapsulated by the first barrier layer so as to reduce electromigration effect in the metal via.
REFERENCES:
patent: 5229325 (1993-07-01), Park et al.
patent: 5571740 (1996-11-01), Peterson
patent: 5658830 (1997-08-01), Jeng
patent: 5910020 (1999-06-01), Yamada
Bothra Subhas
Skala Stephen L.
Niebling John F.
VLSI Technology Inc.
Zarneke David A.
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