Method for enabling direct prefetching of data during...

Details Method for enabling direct prefetching of data during... Method for enabling direct prefetching of data during...

2011-04-05

2011-04-05

Choe, Yong (Department: 2185)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S137000, C711S165000

Reexamination Certificate

active

07921275

ABSTRACT:
While an asynchronous memory move (AMM) operation is ongoing, a prefetch request for data from the source effective address or the destination effective address triggers cache injection by the AMM mover of relevant data from the stream of data being moved in the physical memory. The memory controller forwards the first prefetched line to the prefetch engine and L1 cache, the next cache lines in the sequence of data to the L2 cache, and a subsequent set of cache lines to the L3 cache. The memory controller then forwards the remaining data to the destination memory location. Quick access to prefetch data is enabled by buffering the stream of data in the upper caches rather than placing all the moved data within the memory. Also, the memory controller places moved data into only a subset of the available cache lines of the upper level cache.

REFERENCES:
patent: 2002/0174255 (2002-11-01), Hayter et al.

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