Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-02-14
2004-06-15
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S697000, C205S101000, C205S103000
Reexamination Certificate
active
06750144
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to metallization of semiconductor substrates and more particularly to metallization of semiconductor substrates having surface recesses of different sizes.
2. Brief Description of the Prior Art
In order to interconnect the transistors and associated devices on semiconductor wafers in the manufacture of integrated circuits, it is conventional to etch trenches, vias, and the like, into the surface of the silicon substrate, or into one or more layers of insulating material deposited thereon, and to deposit metal into these recessed structures. As the density of devices on the semiconductor chip has increased and the individual devices have become smaller, the connecting traces also have become smaller. In the manufacture of very large scale integrated (VLSI) chips and ultra large scale integrated (ULSI) chips, highly conductive metals, e.g., copper, have come to be used for the conductive traces, and attempts have been made to deposit the copper in these traces by electrochemical methods. The electroplating of copper traces on the surface of semiconductor wafers using pulse reverse electrodeposition is discussed in U.S. Pat. Nos. 6,203,684 and 6,319,384, the entire disclosures of which is incorporated herein by reference.
However, it has been found that when the features, i.e., trenches, vias, and the like, formed on the surface of a semiconductor wafer are of different sizes, complete filling of all the features on a wafer is difficult to achieve, even when pulse reverse electroplating is used.
Accordingly, a need has continued to exist for a method of filling recesses of all sizes on the surface of a semiconductor wafer using an electrochemical deposition process.
SUMMARY OF THE INVENTION
The problem of filling features of different sizes on the surface of a semiconductor wafer has now been alleviated by the method of the invention using modulated electric fields, i.e., pulse reverse current, wherein features in each size range are filled using a pulse waveform adapted to preferentially fill the selected size. Typically the smaller features are filled first and the larger ones are filled in one or more subsequent steps. It is also according to the invention to incorporate one or more electroetching steps into the process in order to avoid excessive overplating of metal onto the surface of the wafer.
Accordingly, it is an object of the invention to provide a method for electroplating a metal, e.g., copper, onto the surface of a semiconductor having recesses of different sizes therein.
A further object is to provide a method for metallizing the surface of an etched semiconductor wafer without excessive overplate.
Further objects of the invention will be apparent from the description of the invention which follows.
REFERENCES:
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patent: 5720866 (1998-02-01), Erokhine et al.
patent: 5972192 (1999-10-01), Dubin et al.
patent: 6221235 (2001-04-01), Gebhart
patent: 6402931 (2002-06-01), Zhou et al.
patent: 6558231 (2003-05-01), Taylor
Everhart Caridad
Faraday Technology Marketing Group LLC
Lee Calvin
Thompson Hine LLP
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