Method for efficient translation of memory addresses in...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Details

C711S203000

Reexamination Certificate

active

06223270

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of memory management in computer systems. More specifically, the present invention relates to the optimization of memory address translation.
2. Related Art
Memory management is an important facet in the operation of modern computer systems. In particular, efficient memory management is a crucial factor to high performance in today's computer systems. Accordingly, much effort has been expended towards improving the efficiency of memory management, especially with respect to the efficiency of memory-related operations and representations.
One important instance of memory management involves the translation, or mapping, of a memory address from one address space to another address space. An address space delineates a range of memory addresses which a computer system can access under defined circumstances. Typically, multiple address spaces are used in a modern computing environment. For example, when a virtual address is referenced, it is often necessary to identify the physical address corresponding to the virtual address so that the contents at the physical memory location represented by the virtual address can be accessed. In this case, the virtual address of a virtual address space needs to be translated to the underlying physical address of a physical address space.
Generally, software and hardware systems frequently have to translate one synthetic address to a physical address or to another synthetic address. In this context, a synthetic address is a memory address based on an abstract index and an offset. Synthetic addresses within a given synthetic address space share the same abstract index but each has a different offset. Examples of synthetic addresses include virtual addresses and addresses used for remote direct memory access (remote DMA, or RDMA) operations between different computer systems.
In prior art methods for performing address translation or memory mapping, a table-based lookup is generally a required step. For example, a hash table, a page table, or another kind of table is used to store the relationship between a source address and its target address. Whenever an address translation is triggered by an operation requesting access to a source address representing a target address, a table lookup step has to be performed. This step is performed in order to retrieve the target address that corresponds to the source address so that the memory access request can be serviced. Typically, the table lookup step is required every time an address needs to be translated under the prior art.
However, these prior art methods are inefficient because performing a table lookup is expensive both in terms of computational time and space requirement. Under these prior art methods, every address translation requires a table lookup, thus the time and area requirements increase as the number of translations performed becomes larger. Consequently, these prior art methods are far from ideal in systems implementing DMA, where numerous address translations are routinely performed. The inefficiency inherent in these prior art methods is further aggravated in modern computer systems having multiple hosts and with remote DMA implemented, since even more extensive address translations are typical in such an environment. These prior art methods are therefore not well suited to the implementation of modern high speed computer systems.
Thus, there exists a need for a method and system for performing memory address translations with minimal overhead computations, thereby providing improved efficiency and performance enhancement over the prior art in order to meet the ever-increasing performance demand of modern high performance systems.
SUMMARY OF THE INVENTION
Accordingly, the present invention offers a method and system for efficient performance of memory address translations. The present invention also provides a method and system for efficient representation of a remote address within a local address space. Since the present invention enables address translations to be performed using simple arithmetic computations, the table lookup step in address translation, as is typically required in the prior art, is readily eliminated. The present invention thus provides significant improvements in both time and space efficiency over prior art implementations of address translation. In modern computer systems where direct memory access (DMA) operations are used extensively, especially in the emerging field of operating system (OS) bypass technology, the performance improvements afforded by the present invention are particularly critical to the realization of an efficient and high performance system. A method and system for efficiently translating memory addresses in computer systems and the address representation used are thus described herein. These and other advantages of the present invention not specifically described above will become clear within discussions of the present invention herein.
Specifically, one embodiment of the method of the present invention includes the steps of: reserving a target memory region (TMR) in a target address space, where the TMR has a target base address; reserving a source memory region (SMR) in a source address space, where the SMR has a source base address; generating a descriptor which includes information for resolving the target base address of the TMR; and representing the TMR with the SMR in the source address space, where the source base address is selected based on the descriptor such that the target base address can be computed from the source base address without using a lookup table. In one embodiment, the descriptor includes a virtual address representation of the target base address.
Another embodiment of the method of the present invention includes the above steps and wherein the TMR includes a target address having an offset from the target base address, the SMR includes a source address representing the target address, and the source address encodes the offset of the target address such that the target address can be computed from the source address without using a lookup table.
Yet another embodiment of the method of the present invention includes the above steps and further includes the steps of: receiving a request to access a target address of the TMR while operating in a context of the source address space; and servicing the request to access the target address without using a lookup table.


REFERENCES:
patent: 5530820 (1996-06-01), Onodera
patent: 5900004 (1999-05-01), Gipson
patent: 5933857 (1999-08-01), Brewer et al.
patent: 5956755 (1999-09-01), Kanie et al.

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