Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Patent
1995-10-11
2000-01-18
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
711170, 711129, 711136, 711209, G06F 1202
Patent
active
060165359
ABSTRACT:
A method for dynamically caching data objects in a logical cache memory begins by organizing the logical cache memory into a set of maximally equally-sized, contiguous pages that begin at a logical cache base address. Any one of the maximal size logical cache pages may be dynamically subdivided into a set of smaller pages of equal size. The smaller size pages cache data objects having a smaller size than the maximum possible data object size. Each subdivided page stores only those smaller size data objects. The logical address for a page is mapped to at least a maximal size page index identifying the position of the maximal size logical page in the cache and, if the page is a smaller size page, the page location is also mapped to a smaller size page index which identifies a particular one of the smaller size pages located within a maximal size page. Pages are dynamically reconfigured based on a least-recently-used policy. A maximal size page may be reconfigured to provide for storage of multiple smaller sized pages and a set of smaller sized pages may be reconfigured to provide storage for a maximal size page. In one aspect, maximally sized pages may be chained together to provide for storage of data objects which exceed the size of the pages. Chained pages may be contiguous or non-contiguous.
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Bloomfield Marc Alan
Krantz Jeffrey Isaac
Luu Thanh
Chan Eddie P.
Citrix Systems, Inc.
Kim Hong
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