Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
1999-10-19
2003-08-05
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S154000
Reexamination Certificate
active
06604186
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to memory technologies generally and particularly to a paging policy in a memory system.
BACKGROUND OF THE INVENTION
As computer applications become increasingly complex, they also rely heavily on the efficient utilization of fast memory subsystems. Dynamic Random Access Memory (hereinafter DRAM) is one such memory commonly used in computer systems. DRAM is logically organized into “pages”, where a typical page covers between 1 kbytes and 64 kbytes of memory. A page is either in an “open” or “closed” state. When a page is “open”, a system memory controller has instructed a memory device to make its memory information contained in that page immediately available to future commands. On the other hand, when a page is “closed”, the information is only available after the memory controller has instructed the DRAM to open the page.
In addition, the memory subsystem is often divided into regions, or banks, accessible through a single “page window”. Each of these banks may contain many times the number of bytes that are available through the single page window. For example, a DRAM device with a 1 kbyte page window might have banks that are 512 kbytes each. Thus, applying the aforementioned “open” rules to this DRAM device, the device only has 1/512 of its individual bank available for immediate access at any given time. In order to further improve data access to and from the device, a DRAM memory controller's “paging policy” attempts to effectively manage which pages to keep open and which pages to proactively close.
Traditionally, paging polices are simple. Often pages are left open until either a “bank conflict” occurs or the DRAM memory controller becomes unable to track a large number of open pages. In other cases, pages are closed immediately after their data are accessed. This type of paging policy results in no immediate accesses to data but a high probability of avoiding time-consuming bank conflicts. Such a paging policy also allows for faster access within the same page.
However, due to the dynamic nature of user behavior and computer applications, determining in advance the best paging policy for a given system is often impractical. In such situations, in order to improve system performance, a method and apparatus is needed to create more than one paging policy and to dynamically switch between them.
SUMMARY OF THE INVENTION
A method and apparatus of dynamically adjusting a memory system's existing paging policy is disclosed. In one embodiment, the method for dynamically adjusting the paging policy generates a select signal according to at least one input signal and the existing paging policy to the memory system and proceeds to modify the existing paging policy basing on the generated select signal.
REFERENCES:
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patent: 6052134 (2000-04-01), Foster
patent: 6199145 (2001-03-01), Ajanovic et al.
Competitive paging with locality of reference. Allan Borodin, Prabhakar Raghavan, Sandy Irani, Baruch Schieber. Proceedings of the twenty-third annual ACM symposium on Theory of computing Jan. 1991.
Anderson Matthew D.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Kim Matthew
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