Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2002-12-05
2004-06-15
Lam, David (Department: 2818)
Static information storage and retrieval
Read/write circuit
Signals
C365S230060
Reexamination Certificate
active
06751135
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a method for driving memory cells of a dynamic semiconductor memory according to which the memory cells are configured in a cell field and are connected to an output of a word line driver by way of at least one segmented word line. The word line driver is controlled by a signal of a master word line. It is already known that, in memory modules such as dynamic random access memories (DRAMs) a plurality of word lines are spread over the entire surface in the cell field (array region) of the memory chip. The word lines are at a ground potential in a deactivated state. They can be driven by what are known as master word lines, which are usually at a high potential and are switched to ground potential, or 0 V, in an event of activation. Interposed between the master word line and the word line is a word line driver, which inverts the signal of the master word line, so that the corresponding word line switches to the high potential in the event of activation.
Given segmenting of a cell field, word line drivers are disposed in the word lines at regular intervals. The master word lines must then be extended to the individual word line drivers accordingly. The master word lines are usually led across the whole cell field in a separate metal level. For example, depending on the size of the semiconductor chip, 16,000 master word lines can be disposed across four quadrants. The master word lines must then run very close to one another owing to the tight space conditions. This creates the danger of unwanted shorts at adjacent lines because of particles.
Because all master word lines are at high potential in the deactivated state, a leakage current flows against ground, which can be large owing to the large number of master word lines, and which cannot be ignored.
Another disadvantage of this problem is that the leakage current has to be tapped from the operating voltage by the generators. In voltage boosting circuits such as pumps, the problem is amplified, because such circuits work at a very low level of efficiency for physical reasons, and therefore a still larger load current (for instance the input current of the pump is twice as high as the output current) must be supplied, which flows against ground as a wasted leakage current. This is unfavorable for capacitive, thermal, and economic reasons.
In the past, the above problems were avoided by not utilizing segmented word lines. But segmented word lines are becoming necessary with the progress of miniaturization of integrated circuits and with the increasing of their capacity, particularly in memory modules such as DRAMs.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method for driving memory cells of a dynamic semiconductor memory and a circuit configuration that overcomes the above-mentioned disadvantages of the prior art methods and devices of this general type, which reduces a load on a supply network that is caused by unwanted leakage currents in a dynamic semiconductor memory.
With the foregoing and other objects in view there is provided, in accordance with the invention, in a dynamic semiconductor memory having memory cells configured in a cell field, a circuit configuration for driving the memory cells. The circuit configuration contains a master word line having a first part, a second part, and a third part, at least one segmented word line connected to the memory cells, and a word line driver having an output connected to the segmented word line and through the segmented word line to the memory cells. The word line driver is connected to and driven exclusively by the master word line. The word line driver is disposed in the cell field. A first control device is connected to the first part of the master word line and disposed outside of the cell field. The first control device has an output connected to the second part of the master word line. A second control device is connected to the second part of the master word line. The second control device is disposed in a region of the word line driver and connected to the word line driver through the third part of the master word line. The segmented word line, through the word line driver, is connectible to a supply voltage or a ground potential in dependence on a signal on the master word line. The master word line is switchable to a high logic state for activating the word line driver.
The relative advantage of the inventive method for driving the memory cells of the dynamic semiconductor memory is that the portions of the master word lines (inverted master word lines) which run in the cell field are at ground potential in the deactivated state. Only if one of the master word lines outside the cell field is switched to low does the relevant (selected) inverted master word line in the cell field get switched to high. Because this can only be a master word line and is only temporary, the emerging leakage current is extremely small, because the several remaining master word lines are still at ground potential, and therefore no leakage current can develop in those lines. Shorts to other metallization levels such as ground or Vbleq do not cause any long-term loading of the supply generators (Vpp generators) either. In addition, the useful current that must be applied by the generators (Vpp pumps) is substantially smaller and thus the input current of the pump can be reduced substantially, particularly given its poor performance. It is particularly advantageous that this circuit behavior can be achieved with a simple control circuit which is disposed at the beginning of the cell field and which inverts the signal of the master word line.
It is particularly advantageous that the control circuit is constructed as an inverter, with the signal at its input being tapped at the output of the inverter as an inverted signal.
In order to achieve these advantages, the word line drivers for each segmented word line must be moved into the cell field; preferably an additional control device is disposed in the immediate vicinity of the word line driver. That way, practically the entire plane of the master word lines is at ground potential in the deactivated state, and therefore the leakage current is minimal.
It is also advantageous that the additional control device re-inverts the inverted signal of the master word lines. In that way, the original control signal of the master word line is obtained for driving the word line driver, and the wiring of the remaining control logic, including the controlling of the selection transistors and memory cells, does not have to be changed.
With this configuration, the inverted signals are switched to low (ground) by deactivated master word lines and to high (Vpp potential) by an activated master word line in the cell field.
The two control devices are simply realized as gate circuits. These contain simple logical switching transistors such as FETs and are easy to integrate in the silicon chip.
An advantageous alternative solution is to effectuate the inverting of the signals by a one-bit counter. The advantage of the one-bit counter is that it is driven only with a short impulse, being edge-triggered, whereupon it flips into its output state and holds that until the next impulse. This is particularly advantageous for the additional control circuit with respect to minimizing leakage currents. The reason is that a possible leakage current to a neighboring master word line or ground can flow only as long as the drive pulse lasts.
It is also a particularly advantageous solution for the word line driver control to take into account the delays that occur based on the signal transit times through the gate circuits of the two control devices. Taking these delay times into account makes it possible to advantageously achieve an optimal synchronization of the control times for the word line drivers.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described h
Fischer Helmut
Sommer Michael
Greenberg Laurence A.
Infineon - Technologies AG
Lam David
Locher Ralph E.
Stemer Werner H.
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