Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-12-13
2004-01-27
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S051000, C345S055000, C345S067000, C345S098000, C345S099000, C345S100000, C345S204000, C345S209000, C345S210000, C349S143000, C349S149000, C349S151000
Reexamination Certificate
active
06683591
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for driving a liquid crystal display device, and more particularly to a method for driving a matrix liquid crystal display device having plural pixels arranged in a matrix.
2. Related Background Art
In recent years, the liquid crystal display devices are commercialized in various fields such as display for a word processor, a personal computer or the like, electronic view finder for a video camera, projection television or displays for an automobile. Also there is being required image display of a larger size, a higher resolution and a higher image quality.
FIG. 1
schematically shows the configuration of such liquid crystal display device, applied for a television receiver.
In
FIG. 1
there are shown a vertical shift register
10
; a horizontal shift register
20
; switching transistors
22
; a common signal line
24
; a signal inverting circuit
30
; a clock generator circuit
40
; a liquid crystal display panel
100
; address signal lines V
1
, V
2
, . . . , V
m−1
, V
m
; vertical data signal lines D
1
, D
2
, . . . , D
n
; a signal S bearing image information; and an output signal S′ bearing image information, released from the signal inverting circuit
30
.
The vertical data signal lines D
1
-D
n
are connected, respectively through the horizontal transfer switches
22
, to the signal line
24
, and the gates of the horizontal transfer switches
22
receive signals from the horizontal shift register
20
, in response to the signal from the clock generator circuit
40
. The signal from the clock generator circuit
40
is also supplied to the vertical shift register
10
, thus driving the address signal lines V
1
-V
m
in succession in synchronization with the signal S. The signal from the clock generator circuit
40
is further supplied to the signal inverting circuit
30
, thereby inverting the signal S in synchronization therewith. The clock generator circuit
40
is given an unrepresented synchronization signal, prepared from the image information bearing signal S, in order to achieve synchronization with the signal S.
In this manner the vertical shift register
10
, the horizontal shift register
20
and the signal inverting circuit
30
effect the desired television scanning operation, by means of the pulses prepared by the clock generator
40
.
In the liquid crystal panel
100
, a row of pixels is selected by the address signal lines V
1
-V
m
from the vertical shift register
10
, and the vertical data signal lines D
1
-D
n
are selected by the successive activations of the horizontal transfer switches
22
by driving pulses H
1
−H
m
from the horizontal shift register
20
, whereby image signals are supplied to the respective pixels.
As explained in the foregoing, the input terminals of the horizontal transfer switches
22
are connected, through the common signal line
24
, to the signal inverting circuit
30
, which is provided for converting the input image signal into an AC drive signal, in order to prevent deterioration in the characteristics of the liquid crystal. For AC driving of liquid crystal, there are already known various methods such as frame inversion, field inversion,
1
H (horizontal scanning period) inversion and bit (every pixel) inversion.
FIG. 2
is an equivalent circuit of the liquid crystal panel
100
shown in FIG.
1
. In
FIG. 2
, there are only shown four pixels driven with the data signal lines D
1
, D
2
and the address signal lines V
1
, V
2
within the liquid crystal panel
100
.
Referring to
FIG. 2
, there are shown liquid crystal pixels
5
; switching transistors
7
respectively attached to the pixels; common electrode lines
16
; and additional capacitances
9
. Electrodes of the liquid crystal pixel
5
and the additional capacitance
9
are electrically connected to the output side of the respective switching transistor
7
, and the other electrodes are connected to the common electrode line
16
. The input terminals of the switching transistors
7
are electrically connected, in groups of respective vertical columns of pixels, to the data signal lines D
1
, D
2
. Also the address signal lines V
1
, V
2
are electrically connected, in groups of respective horizontal rows of pixels, to the gates of the switching transistors
7
.
In
FIG. 2
, C
LC
and C
S
respectively indicate the equivalent capacitance of the liquid crystal pixel and the additional capacitance.
FIG. 3
is a timing chart showing an example of the output signal S′ from the signal inverting circuit
30
. The input signal S bearing image information is converted into the output signal S′ by inversion by every
1
H. In
FIG. 3
, V
LC
is the potential of the common electrode, V
DL
is the black level of the positive image signal, V
WL
is the white level thereof, V
DH
is the black level of the negative image signal, and V
WH
is the white level thereof.
As the signal inversion generates an image signal symmetrical to the common electrode potential V
LC
, the entire signal amplitude (V
DL
-V
DH
) is equal to twice of (V
DL
-V
LC
), so that it becomes about 10V if the potential difference between V
DL
and V
LC
is about 5 V.
In the circuit shown in
FIG. 2
, if the switching transistors
7
and the horizontal transfer switches
22
are composed of p-MOS transistors, each transistor becomes non-conductive in response to an input signal of a voltage lower than the threshold voltage V
th
of said transistor. In most cases, for maintaining the non-conductive state in a range from the ground potential G
ND
to V
DL
in consideration of the operating margin, the voltage of the image signal S′ becomes larger than the potential difference mentioned above. In the foregoing example, this signal voltage is usually taken as about 13 V or larger.
As the above-explained driving method involves a high driving voltage, a high voltage resistance is required in the driving devices for the liquid crystal display device, and a matching design is required for the wirings etc. This fact inevitably leads to a lowered production yield, a higher cost and a higher power consumption of the liquid crystal display device.
In order to overcome such drawbacks, there have been proposed methods as disclosed in the Japanese Patent Laid-open Application Nos. 54-98525 and 1-138590.
The method disclosed in the Japanese Patent Laid-open Application No. 54-98525 consists of inverting the common electrode potential V
LC
in synchronization with the inversion of the image signal S′, thereby selecting a same amplitude range for the positive and negative image signals and reducing the entire signal amplitude range to about ½.
However, such method may lead to the following difficulty.
Usually the liquid crystal capacitance C
LC
is in the order of several ten fF, while the additional capacitance C
S
is about 100 fF. If the total capacitance for a pixel is 100 fF, the total capacitance of the entire liquid crystal display device becomes about 10,000 pF when it is applied to a television display, as there are at least required 100,000 pixels.
Consequently, for driving such liquid crystal display device for example with a signal amplitude range of ca. 7 V, there is required a high-speed pulse drive of a load capacitance of 10,000 pF with a potential difference of ca. 7 V. Such requirement inevitably results in an increased magnitude and an elevated cost of the driving circuits.
Besides, the number of pixels of the liquid crystal display device is increasing, for achieving color display or a higher image quality. For this reason the capacitance of the device will correspondingly increase, for example to 30,000 pF for 300,000 pixels, or 50,000 pF for 500,000 pixels, so that cost reduction and compactization of the driving circuits will become more difficult to achieve.
On the other hand, the method disclosed in the Japanese Patent Laid-open Application No. 1-138590 consists of employing separate common electrodes for the liquid crystal and for the additional capacitan
Hashimoto Seiji
Ishii Takayuki
Kondo Shigeki
Shigeta Kazuyuki
Sono Koichi
Abdulselam Abbas I
Hjerpe Richard
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