Method for digital signal processing, DSP, mobile communication

Details Method for digital signal processing, DSP, mobile communication Method for digital signal processing, DSP, mobile communication

1997-08-15

2000-11-07

Lane, Jack A.

Electrical computers and digital processing systems: memory

Address formation

Generating a particular pattern/sequence of addresses

711 5, G06F 1200

Patent

active

061450707

ABSTRACT:
The invention relates to a digital signal processor in which two multiply accumulate operations are carried out in one machine cycle. Only one address generation unit is required for addressing two data words of both the X and Y memories, since in the main processing loop the least significant address bit is considered as "Don't care", so that an access operation to the memory results in two output data words at a time.

REFERENCES:
patent: 4609996 (1986-09-01), Kummer
Motorola Semiconductor Technical Data, Advance Information DSP56301, p. 01, Motorola Inc., 1995.

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