Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant
Reexamination Certificate
1999-02-01
2002-02-19
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Diffusing a dopant
C438S542000
Reexamination Certificate
active
06348397
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method and an apparatus for diffusion of an impurity into a semiconductor wafer with a high in-plane diffusion uniformity over an entire surface of the semiconductor wafer.
A vertical diffusion furnace was used for a diffusion of an impurity into a semiconductor wafer by use of a vertical diffusion furnace.
FIG. 1
is a schematic cross sectional elevation view illustrative of the conventional apparatus for diffusing an impurity into semiconductor wafers.
FIG. 2
is a plane view illustrative of a furnace core tube of the conventional apparatus for diffusing an impurity into semiconductor wafers. The conventional apparatus has a furnace core tube
1
and quartz boards
2
provided in the furnace core tube
1
for holding semiconductor wafers
2
. The conventional apparatus also has an impurity source container
4
for reserving an impurity source such as POCl
3
and a mass flow controller
5
for controlling a flow rate of a nitrogen gas to be supplied into the impurity source container
4
. The conventional apparatus also has a gas injector
6
for injecting an impurity gas into the furnace core tube
1
and a gas feeding pipe
7
for feeding oxygen and nitrogen gases into the furnace core tube
1
. The conventional apparatus also has a heater
8
for heating the furnace core tube
1
.
The semiconductor wafers
2
are supported or held by the quartz boards so that the semiconductor wafers
2
lie horizontally whereby the normal of plane of the semiconductor wafer
2
is vertically directed. The gas injector
6
has a vertical alignment of a plurality of gas injection nozzles
6
A along a longitudinal direction. The furnace core tube
1
has a vertical center axis. The gas injection nozzles
6
A inject the impurity gases in a horizontal direction and toward the vertical center axis of the furnace core tube
1
but uniformly in the vertical direction.
The diffusion process for diffusing the impurity into the wafers is carried out as follows.
One hundred or two hundreds semiconductor wafers
2
are loaded on the quartz boards
3
so that the semiconductor wafers
2
horizontally lie in parallel to the horizontal direction to which the gas injection nozzles
6
A are directed. The quartz boards
3
are inserted into the diffusion furnace tube
1
heated up to a predetermined temperature so that the diffusion furnace tube
1
rotates around the rotational axis vertically extending at a predetermined rotational rate.
A nitrogen gas is introduced through the mass flow controller
5
into the impurity source container
4
at a predetermined flow rate for forming an impurity gas which is to be supplied through the gas injector
6
and the gas injection nozzles
6
A into the diffusion furnace tube
1
.
Oxygen and nitrogen gases are fed through a gas feeding pipe
7
into the diffusion furnace tube
1
, at flow rates of 0.1-5 liters/min. and 5-30 liters/min., respectively, so that those gases are reacted with the impurity gas on the surfaces of the semiconductor wafers
2
, whereby a glass layer containing impurities such as phosphorus glasses is formed on the surfaces of each of the semiconductor wafers
2
. Subsequently, a heat treatment is carried out to diffuse the impurity from the glass layer into the semiconductor wafer
2
. The diffused impurity in the semiconductor wafer
2
is further activated by a further heat treatment so that the activated impurity serves as an n-type impurity or a donor in the semiconductor wafer.
The semiconductor wafers
2
are loaded on the quartz boards
3
so that the semiconductor wafers
2
horizontally lie. During rotation of the quartz boards
3
along with the semiconductor wafers
2
, faces of the semiconductor wafers
2
remain directed in upward direction. A difference in distance of the center of the wafer
2
to the gas injection nozzle
6
A from the peripheral portion of the wafer to the same gas injection nozzle
6
A is so large, whereby the impurity gas is not uniformly supplied onto the entire surfaces of each of the semiconductor wafers. If, for example, the wafer has a diameter of 150 millimeters and four semiconductor wafers
2
are loaded on each stage of the assemble of the quartz boards
3
, a difference in distance of the center of the wafer
2
to the gas injection nozzle
6
A from the peripheral portion of the wafer to the same gas injection nozzle
6
A is 75 millimeters.
When the impurity diffusion process is carried out by use of a vertical type diffusion furnace, it is necessary to prevent diffusions of other impurities than the diffusion-purpose impurity. For this purpose, the high purity quartz boards for supporting the wafer is preferable other than use of a more complicated mechanism such as clump. In place of the quartz boards, high purity silicon carbide and polycrystalline silicon are also preferably useable. This is disclosed in Japanese laid-open patent publication No. 8-227860.
In Japanese laid-open patent publication No. 6-183883, it is disclosed to realize a possible uniform vapor phase epitaxy by rotating semiconductor wafers around a vertically extending rotational axis, wherein the semiconductor wafers on a side wall of a scepter on rotation are exposed to down flow of the reaction gas along the surfaces of the semiconductor wafers. There is a large difference in distance of the center of the wafer from the gas injection nozzle from the peripheral portion of the wafer from the same gas injection nozzle, for which reason even if this method is applied to the impurity diffusion process, it is difficult to obtain a high in-plane uniformity of impurity diffusion over an entire surface of the wafer.
In Japanese laid-open patent publication No. 8-316222, it is disclosed that a single wafer holder for holding a single semiconductor wafer is varied in direction around a center of the single semiconductor wafer. This holder is not applicable to the above apparatus for diffusions of impurity into a plurality of the semiconductor wafers in the furnace core tube.
In accordance the prior art, the above conventional structures for holding the semiconductor wafers do allow no in-plane uniform supply of an impurity onto an entire surface of each of the semiconductor wafers, whereby no in-plane uniform diffusion of the impurity over the entire surface of the semiconductor wafer is caused and no in-plane uniform impurity concentration over the entire surface of the semiconductor wafer is obtained. This further allows no improvement in in-plane uniformity of characteristics of the semiconductor devices such as transistors on the semiconductor wafers.
In the above circumstances, it had been required to develop novel method and apparatus for diffusion of an impurity into semiconductor wafers free from the above problems.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a novel apparatus for diffusion of an impurity into semiconductor wafers free from the above problems.
It is a further object of the present invention to provide a novel apparatus for diffusion of an impurity into a semiconductor wafer to obtain a highly in-plane uniform supply of impurity over an entire of the semiconductor wafer.
It is a still further object of the present invention to provide a novel apparatus for diffusion of an impurity into a semiconductor wafer to obtain a highly in-plane uniform diffusion of impurity over an entire of the semiconductor wafer.
It is yet a further object of the present invention to provide a novel apparatus for diffusion of an impurity into a semiconductor wafer to obtain a highly in-plane uniform impurity concentration over an entire of the semiconductor wafer.
It is a further more object of the present invention to provide a novel process for diffusion of an impurity into a semiconductor wafer.
It is still more object of the present invention to provide a novel process for diffusion of an impurity into a semiconductor wafer to obtain a highly in-plane uniform supply of impurity over an entire of the semiconductor wafer.
It
Chambliss Alonzo
Chaudhuri Olik
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