Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-12-25
2007-12-25
Ellis, Kevin L. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
10974152
ABSTRACT:
As part of some embodiments of the present invention, there is provided a method, a circuit and a system for managing data in a cache memory of a mass data storage device and/or system. In accordance with some embodiments of the present invention, a data portion's priority in the cache may be altered. The priority of the data portion may be altered as a function of an access parameter associated with the data portion and a fetch parameter associated with the data portion.
REFERENCES:
patent: 4928239 (1990-05-01), Baum et al.
patent: 5381539 (1995-01-01), Yanai et al.
patent: 5513336 (1996-04-01), Vishlitzky et al.
patent: 5592432 (1997-01-01), Vishlitzky et al.
patent: 5682500 (1997-10-01), Vishlitzky et al.
patent: 5706467 (1998-01-01), Vishlitzky et al.
patent: 5765213 (1998-06-01), Ofer
patent: 5983324 (1999-11-01), Ukai et al.
patent: 6715039 (2004-03-01), Michael et al.
patent: 2002/0087802 (2002-07-01), Al-Dajani et al.
patent: 2005/0289301 (2005-12-01), Woo et al.
Cohen Dror
Helman Haim
Revah Yaron
Schwartz Shemer
Zohar Ofir
Ellis Kevin L.
Katten Muchin & Rosenman LLP
XIV Ltd
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