Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2003-09-26
2008-05-06
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C438S098000, C438S106000
Reexamination Certificate
active
07370303
ABSTRACT:
In the case of a method according to the invention for determining the arrangement of contact areas on the active top side of a semiconductor chip arranged in or on a housing, firstly semiconductor chip data, contact area data, housing data and production data are read in, from which a model of an electronic device is then determined. This is followed by determining the arrangement of the contact areas in said model of the electronic device. The contact area arrangement data thus determined are provided for subsequent fabrication and/or design processes.
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Ho Chew Choy Paul, SG, “Pad Placement Algorithm for Four-sided Packages”, Siemens Technik Report, JG 4 Nr. 10, Jan. 2001, pp. 142-150.
Einspenner Juergen
Gliese Dagmar
Ziebell Herbert-Arndt
Chiang Jack
Dicke Billig & Czaja, PLLC
Doan Nghia M.
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