Method for determining relevant circuit parts in a circuit...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07451414

ABSTRACT:
Method for determining relevant circuit parts in a circuit in the event of loading with a temporally variable signal comprises providing a computer-implemented model of the circuit, in which the circuit components are represented at least partly by equivalent DC signal models, the parameters of which take account of at least one parameter of the temporally variable signal, carrying out a DC signal analysis for the circuit on the basis of the model provided, and taking account of a DC signal which is present at at least two connections for coupling in the temporally variable signal and is dependent on at least one of the parameters of the temporally variable signal.

REFERENCES:
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patent: 6553542 (2003-04-01), Ramaswamy et al.
patent: 6591233 (2003-07-01), Sonoda
patent: 7024646 (2006-04-01), Logie et al.
patent: 7243317 (2007-07-01), Wang et al.
patent: 7302378 (2007-11-01), Hayashi
Baird et al., “VerifyESD: A Tool for Efficient Circuit Level ESD Simulations of Mixed-Signal ICs”, EOS/ESD Symposium Proceedings, IEEE, Sep. 2000, pp. 465-469, (5 pages).
Gossner, “ESD Protection for the Deep Sub Micron Regime—A Challenge for Design Methodology”, Proceedings of the 17thInternational Conference on VLSI Design, Jan. 2004, pp. 809-818, (10 pages).

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