Method for determining features associated with fails of...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C714S724000, C714S736000

Reexamination Certificate

active

07870519

ABSTRACT:
A method for testing an integrated circuit and analyzing test data. The method includes: defining a set of signal path selection criteria; selecting a subset of signal paths of an integrated circuit design, the selecting signal paths meeting the selection criteria; identifying pattern observation points for each signal path of the subset of signal paths; selecting a set of features associated with the integrated circuit design; applying a set of test patterns to one or more integrated circuit chips; determining failing signal paths of the subset of signal paths for each integrated circuit chip; mapping failing signal paths of the subset of signal paths to the set of features to generate a correspondence between the failing signal paths and the features; and analyzing the correspondence and identifying suspect features of the set of features based on the analyzing.

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patent: 2005/0229057 (2005-10-01), Anderson et al.
patent: 2007/0220384 (2007-09-01), Bartenstein et al.
patent: 2007/0260952 (2007-11-01), Devanathan et al.
patent: 2008/0077833 (2008-03-01), Motika et al.

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