Method for designing semiconductor circuit

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06934925

ABSTRACT:
This invention provides a method for designing a semiconductor circuit which comprises a macro design step for designing plural macros in which plural cells are internally connected and a whole circuit design step for configuring plural macros and designing external wirings. The macro design step secures beforehand internal wiring prohibiting regions which enable to wire external wirings vertically and horizontally across the macro, and buffer allocable regions which allocate buffers as repeaters for the external wirings. The whole circuit design step enables to wire external wirings across the macro by passing through the internal wiring prohibiting regions of the macro and to configure the buffers as repeaters which are connected with the external wirings inside the buffer allocable regions of the macro.

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patent: 6629300 (2003-09-01), Otake
patent: 2002/0010901 (2002-01-01), Otaguro
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