Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-10-27
2002-11-05
Sier, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C438S129000, C257S208000, C257S347000, C257S369000, C257S691000
Reexamination Certificate
active
06477694
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for designing a power supply decoupling circuit that employs power wiring of a printed circuit board as an inductor.
2. Description of the Prior Art
Generally, signal wiring for a digital circuit tends to propagate unwanted electromagnetic waves around the circuit and to cause electromagnetic interference (hereinafter referred to as EMI). Especially when a multi-layer printed circuit board is employed, the power supply system, which includes a power source layer and a ground layer, tends to serve as an oscillator and to produce electromagnetic waves. Therefore, when a power supply system is designed, it is important that it include some countermeasure for preventing unwanted oscillations, and above all, the decoupling circuit is well known as an electrical circuit that has been used to effectively reduce EMI.
For example, in Japanese Unexamined Patent Publications No. Hei 10-97560 and No. Hei 11-15870 design support systems are disclosed in which, for each, an EMI countermeasure is implemented by including a power supply decoupling capacitor (hereinafter referred to as a decoupling capacitor). According to these systems, the wiring layout of a printed circuit board is depicted in a drawing to permit a viewer to visually apprehend the effective range of an arrangement that includes a decoupling capacitor. However, according to the conventional art, no consideration is given to providing a method for selecting an appropriate decoupling capacitor for a large-scale integrated circuit (hereinafter referred to as an LSI) on a printed circuit board.
When the power supply decoupling circuit is constituted by a decoupling capacitor, most of the high-frequency elements of a power source current that operates an LSI is supplied by the decoupling capacitor, and the volumes of the electric charges differ greatly, depending on the circuit structure and the size of the LSI circuit. Thus, an effective procedure is for a decoupling capacitor to be selected for each LSI, and generally, for the printed circuit board designer to be in charge of designing the decoupling capacitor, which is based on the circuit structure of an LSI.
However, it is normal for the circuit information for an LSI to not be opened to the public by a printed circuit board designer, and currently, even if another designer obtains the LSI circuit data, that designer does not have a specific index for designing a decoupling capacitor. Furthermore, since multiple LSIs are mounted on a printed circuit board, the determination of an appropriate decoupling capacitor for each LSI is a very troublesome task.
As another conventional example, a multi-layer printed circuit board is disclosed in Japanese Unexamined Patent Publication No. Hei 9-139573. In this example, a power supply layer, which is generally a flat plate, is constituted by a power wiring network, and a direct current having a high frequency is supplied to each LSI via this network. According to this example, a power supply decoupling inductor (hereinafter referred to as a decoupling inductor), which is parasitic relative to the power wiring, prevents a high frequency direct current from flowing across the power wiring network, and reduces the production of electromagnetic waves by a power supply system.
However, unlike the employment of the flat plate of the power supply layer, the length of a power wiring line must be determined for the power terminal of each LSI when a multi-layer printed circuit board is designed, and since a method for determining what wiring length is to be used is not described in the above conventional example, the design of the power wiring is difficult.
For example, from the viewpoint of the designer of an EMI countermeasure, since the area available on a printed circuit board is ordinarily limited, generally, only the minimum possible wiring length is available for use. Whereas, on the other hand, to reduce EMI an extended wiring length is required. Therefore, an optimal wiring length must be determined when an LSI and a printed circuit board are designed, and this makes the design of power supply wiring an extremely difficult task.
In addition, as well as when a decoupling capacitor is employed, a high frequency direct current that flows across a power supply system is greatly dependant on the circuit structure of an LSI, and therefore, a direct current and an inductance must be determined in advance for each power line. Thus, since the number of LSIs mounted on printed circuit boards is constantly increasing, year by year, the individual wiring layouts have become highly complicated and their design involves the expenditure of a-great deal of effort.
As is described above, if a power supply decoupling circuit is designed using these conventional examples, the capacitance of the decoupling capacitor and the inductance of the power wiring are increased for the power terminal of each LSI, and the propagation of electromagnetic waves can be effectively reduced. However, the occurrence of a variety of the above mentioned shortcomings can not be avoided, and it is technically important that a method for effectively resolving these problems be found.
Specifically, first, a capacitance required for a decoupling capacitor must be rendered easier to design. To do this, even when multiple LSIs are mounted on a printed circuit board, an index for determining the capacitance of a decoupling capacitor, prepared while taking each LSI into account, must be provided a designer.
Second, the length of a power line, which is used as a decoupling inductor, must be easy to obtain, and the layout of the power wiring must be easy to design. To do this, an index for determining the length of a power line must also be provided for a designer.
SUMMARY OF THE INVENTION
It is, therefore, one objective of the present invention is to provide a method for designing a power supply decoupling circuit for which a power supply system, which reduces unwanted electromagnetic wave irradiation, can be easily designed when the design of a printed circuit board is automated.
To achieve this objective, in accordance with the present invention, a power supply decoupling circuit design method, for a printed circuit board wiring pattern for power wiring, which is extended from a power terminal of a semiconductor integrated circuit to a power supply layer or to a main power line, for a printed circuit board to which a direct current is supplied by one of the power supply layers and the main power line, and for designing a power decoupling capacitor that is located between the power terminal and either a ground layer or ground wiring for the printed circuit board, comprises the steps of:
setting, in advance, an electric charge that flows from a direct current power source to the power terminal in response to the operation of the semiconductor integrated circuit, a direct current voltage for the direct current and a terminal voltage for the power terminal, a permissible voltage change in the power supply decoupling circuit, and a ratio for a current reduction in a high frequency element that is accompanied by the operation of the semiconductor integrated circuit;
dividing the electric charge by the terminal voltage to obtain a load capacitance for the semiconductor integrated circuit;
multiplying the direct current voltage by the load capacitance and dividing the product by the permissible voltage change;
designing the power supply decoupling capacitor using the results of the division;
multiplying the current reduction ratio by an impedance obtained from the power supply decoupling capacitor; and
designing the printed circuit board wiring pattern using a power supply decoupling inductor obtained by applying the results of the multiplication.
REFERENCES:
patent: 4714981 (1987-12-01), Gordon
patent: 4752887 (1988-06-01), Kuwahara
patent: 4878155 (1989-10-01), Conley
patent: 5526313 (1996-06-01), Etoh et al.
patent: 5646572 (1997-07-01), Masleid
patent: 5731960 (1998-03-01), Fung
patent: 6075
Ando Noriaki
Irino Hitoshi
Tohya Hirokazu
Wabuka Hiroshi
Dickstein Shapiro Morin & Oshinsky LLP.
Liu Andrea
NEC Corp.
Sier Vuthe
LandOfFree
Method for designing a power supply decoupling circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for designing a power supply decoupling circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for designing a power supply decoupling circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2987361