Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
1999-11-19
2001-03-27
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S787000
Reexamination Certificate
active
06207590
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to semiconductor manufacturing processes, and more particularly, to a method for forming a silicon dioxide layer using silane in a plasma enhanced chemical vapor deposition (PECVD) process.
BACKGROUND OF THE INVENTION
Interlayer (ILD) and intermetal (IMD) dielectric layers are commonly used to isolate conducting structures, such as metal layers, from subsequently deposited conducting layers. The interlayer and intermetal dielectric layers are typically formed using some type of silicate glass, whether it be borophosphosilicate glass (BPSG), tetraethylorthosilicate (TEOS), spin-on-glass (SOG), or chemical vapor deposition (CVD) silicon oxide. These oxides are also used in a variety of other semiconductor applications, such as passivation layers, as diffusion and implantation masks, and as capping layers. Thus, the efficient formation of oxides is an important part of the semiconductor manufacturing process.
One of the more popular and useful types of oxide is silicon dioxide that is deposited using a plasma enhanced CVD process (PECVD). For example, the silicon dioxide may be deposited using a PECVD apparatus, such as the Centura machine manufactured by Applied Materials. The PECVD process is dependent upon many factors, including temperature, pressure, gas composition, gas flow rate, RF power density, frequency, and duty cycle.
By varying the parameters upon which the PECVD oxide is formed, the “quality” of the oxide can be varied. In particular, the refractive index (n) of the oxide is often used as an indicator of quality. Thermal oxide has a refractive index of 1.46. A value of n greater than 1.46 indicates a silicon rich film, while smaller values indicate a low density, porous film. Nevertheless, for the so-called “bulk oxide” layer of an intermetal dielectric, a value of n of about 1.46 is adequate and indeed preferred. The requirement of the refractive index in many IMD applications is 1.46±0.015 for the reason of (1) electrical performance, and (2) process integrity. This is because most photolithography processes (that will inevitably be performed after deposition of the bulk oxide layer) are optimized for an index of refraction of about 1.46. Thus, while for some applications, a high index of refraction is preferred, for bulk oxide applications, an index of refraction in the 1.46 range is preferred.
Another measure of the quality of a silicon dioxide film is its resistance to compressive strength. Typically, conventional CVD oxides can withstand a stress level of 1E+09 dynes/cm
2
. It is preferable that the oxide have a high resistance to stress to prevent cracking. Furthermore, because PECVD oxide is used in many applications, in addition to the quality of the oxide, the process and speed by which it is formed is of great concern to reduce manufacturing cost. Semiconductor processes are constantly being examined for ways to increase throughput. Thus, the present invention provides a method for forming a high quality PECVD oxide having greater throughput and efficiency over conventional PECVD processes.
SUMMARY OF THE INVENTION
A method of forming a silicon dioxide layer in a silane based plasma enhanced chemical vapor deposition process is disclosed. The process comprises: flowing silane into said process chamber; flowing N
2
O into said process chamber; generating a RF signal at a first predetermined power at a first frequency; and generating a RF signal at a second predetermined power at a second frequency.
REFERENCES:
patent: 5904566 (1999-05-01), Tao et al.
patent: 6041734 (2000-03-01), Raoux et al.
patent: 6077764 (2000-06-01), Sugiarto et al.
Blakely , Sokoloff, Taylor & Zafman LLP
Ghyka Alexander G.
Niebling John F.
Wafertech, Inc.
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