Electrolysis: processes – compositions used therein – and methods – Electrolytic coating
Reexamination Certificate
2000-11-14
2002-04-02
Valentine, Donald R. (Department: 1741)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
C205S640000, C118S300000, C427S299000, C427S331000, C427S444000, C427S402000, C438S758000
Reexamination Certificate
active
06365025
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of semiconductor wafer processing and, more particularly, to a multiple station processing chamber for depositing and/or removing a material on a semiconductor wafer.
2. Description of the Related Art
In the manufacture of devices on a semiconductor wafer, it is the practice to fabricate multiple levels of conductive (typically metal) layers above a substrate. The multiple metallization layers are employed in order to accommodate higher densities as device dimensions shrink well below one-micron design rules. Likewise, the size of interconnect structures also need to shrink in order to accommodate the smaller dimensions. Thus, as integrated circuit technology advances into the sub-0.25 micron range, more advanced metallization techniques are needed to provide improvements over existing methods of practice.
One approach has been to utilize copper as the material for some or all of the metallization of a semiconductor wafer (see for example, “Copper As The Future Interconnection Material;” Pei-Lin Pai et al.; Jun. 12-13, 1989 VMIC Conference; pp. 258-264). Since copper has a better electromigration property and lower resistivity than aluminum, it is a more preferred material for providing metallization on a wafer than aluminum. In addition, copper has improved electrical properties over tungsten, making copper a desirable metal for use as plugs (inter-level interconnect) as well. However, one serious disadvantage of using copper metallization is that it is difficult to deposit/etch. It is also more costly to implement than aluminum. Thus, although enhanced wafer processing techniques are achieved by copper, the potential cost associated with copper processing is a negative factor. Accordingly, it is desirable to implement copper technology, but without the associated increase in the cost of the equipment for copper processing.
In order to fabricate features, circuits, and devices on a substrate, such as a semiconductor wafer, various techniques are known to deposit and etch materials on the wafer. Deposition techniques include processes such as physical vapor deposition (PVD), chemical vapor deposition (CVD), sputtering, and immersion of the wafer in an electrolyte. This last technique can be used for either electroless deposition or for electroplating. In an electroplating technique, the substrate is immersed in an electrolyte (or processing fluid) and positioned in an electric field between a cathode and an anode such that charged particles are deposited onto the surface of the wafer. (See for example, U.S. Pat. No. 5,441,629, which is titled “Apparatus and Method of Electroplating.”)
Similarly, a number of techniques are known for removing a material from a wafer. These techniques include reactive ion etching (RIE), plasma etching, chemical-mechanical polishing (CMP), and immersion of the wafer in an electrolyte. Material removal by subjecting an immersed wafer to an electric field employs an equivalent setup to that used for electroplating, but with an opposite result, since charged particles are removed from the wafer in this instance.
Various processing chambers have been used in which a substrate, such as a semiconductor wafer, is exposed to an electrolyte (or processing fluid) for processing. The chamber has then been emptied through openings along the sides of the chamber and/or through a drain at the base of the chamber. As the electrolyte is drained from the processing chamber, however, the unprocessed side (the back) of the wafer is often exposed to the electrolyte. It would be advantageous if an electrolyte could be drained from the processing chamber into a separate fluid containment ring for storage, disposal, and/or recycling without exposing the back of the wafer to the electrolyte.
When using a processing chamber, it is generally preferred that the chamber be completely emptied, rinsed, and often dried before each subsequent injection of an electrolyte into the chamber housing the wafer for processing. Additionally, in order to be able to store and/or reuse/recycle each electrolyte, the overflow openings, the outer sides of the chamber, and the drain must each be completely emptied, rinsed, and usually dried to prevent the exposure and/or contamination of each subsequent electrolyte with the previous electrolyte(s) used to process the wafer. The features required to clean the chamber before and after each electrolyte is injected and later drained from the chamber are an added cost in the manufacturing of the chamber and in the actual processing of the wafer. Further, it is difficult to completely remove all traces of an electrolyte from the drain and chamber exterior, and thus some contamination of the electrolyte(s) is highly likely.
The processing chamber used to deposit and/or remove material on a wafer may be sealed to allow the process to occur in a vacuum, at a given pressure or temperature, or at clean room conditions. However, when moving the wafer between processing chambers, the wafer is often exposed to the ambient conditions external to the processing chamber. Thus, it would be advantageous to have a processing chamber in which multiple processes could be applied to a wafer within a single sealed chamber.
The present invention employs a method and apparatus for multiple step processing of a substrate through use of a multiple station processing chamber. Each processing step (or each processing step involving a different electrolyte) has its own processing station in which a particular electrolyte is applied to the wafer. The separate stations eliminate the need for the repeated rinsing and drying required of a single processing chamber before application of each subsequent electrolyte. Further, since each processing station has a separate draining system, each electrolyte may be recycled and reused without contamination by traces of other electrolytes. Recycling and reuse of the electrolytes greatly reduces the liquid volume usage requirements of processing a wafer.
SUMMARY OF THE INVENTION
The present invention describes a multiple station processing chamber used to deposit and/or remove a material on a semiconductor wafer. The multiple station processing chamber is comprised of two or more processing stations at which the wafer is exposed to a processing fluid. The processing stations are positioned within the chamber such that the wafer may be moved from station to station. Each station of the multiple station processing chamber may have a fluid containment ring used for containment, disposal, and/or reuse of the electrolyte used to process the wafer at that particular processing station. The wafer is raised on a wafer support to the first processing station where it is exposed to a first processing fluid, which is then diverted into a first fluid containment ring. The wafer is then lowered on the wafer support to a second processing station where the wafer is exposed to a second processing fluid, which is then diverted into a second fluid containment ring. This continues until all processing steps have been completed.
A processing chamber using multiple processing stations provides an apparatus and method that eliminates the need for repeated rinsing and drying of a processing chamber and draining system before application of each subsequent processing fluid. Further, since each processing fluid has a separate draining system, each processing fluid may be more easily recycled and reused without contamination by traces of previous processing fluids used in the chamber. Recirculation and reuse of the processing fluids greatly reduces the liquid volume usage requirements of processing a wafer.
REFERENCES:
patent: 5679406 (1997-10-01), Berta
patent: 5830805 (1998-11-01), Shacham-Diamand et al.
Holtkamp William H.
Ting Chiu H.
Blakely & Sokoloff, Taylor & Zafman
CuTek Research Inc.
Valentine Donald R.
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