Method for depositing a metal gate on a high-k dielectric film

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S785000, C438S782000, C257SE21625

Reexamination Certificate

active

07655549

ABSTRACT:
A method to improve a high-k dielectric film and metal gate interface in the fabrication of a MOSFET by depositing a metal gate on a high-k dielectric, the method includes annealing a substrate with a high-k dielectric film deposited thereon in a thermal annealing module and depositing a metal gate material on the annealed substrate in a metal gate deposition module, wherein the annealing step and the depositing step are carried out consecutively without a vacuum break.

REFERENCES:
patent: 5376223 (1994-12-01), Salimian et al.
patent: 5478780 (1995-12-01), Koerner et al.
patent: 5587039 (1996-12-01), Salimian et al.
patent: 6294820 (2001-09-01), Lucas et al.
patent: 6391727 (2002-05-01), Park
patent: 6624093 (2003-09-01), Lyman et al.
patent: 6734069 (2004-05-01), Eriguchi
patent: 6737716 (2004-05-01), Matsuo et al.
patent: 6747748 (2004-06-01), Matsudo et al.
patent: 6806145 (2004-10-01), Haukka et al.
patent: 6858524 (2005-02-01), Haukka et al.
patent: 2003/0075740 (2003-04-01), Bai et al.
patent: 2004/0217410 (2004-11-01), Meng et al.
patent: 2005/0070123 (2005-03-01), Hirano
patent: 2005/0227500 (2005-10-01), Sugawara et al.
patent: 2005/0233526 (2005-10-01), Watanabe
patent: 2005/0282369 (2005-12-01), Karabacak et al.
patent: 4-225223 (1992-08-01), None
patent: 6-29248 (1994-02-01), None
patent: 9-148246 (1997-06-01), None
patent: 2000-232077 (2000-08-01), None
patent: 2000-243951 (2000-09-01), None
patent: 2001-237424 (2001-08-01), None
patent: 2002-118160 (2002-04-01), None
patent: 2002-184773 (2002-06-01), None
patent: 2002-314074 (2002-10-01), None
patent: 2003-249497 (2003-09-01), None
patent: 2006-237371 (2006-09-01), None
patent: WO 03/088342 (2003-10-01), None
patent: WO 2004/008544 (2004-01-01), None
Kazutaka Honda et al., “Pulsed Laser Deposition and Analysis for Structural and Electrical Properties of HfO2-TiO2Composite Films”, Japanese Journal of Applied Physics, vol. 43, No. 4A, 2004, pp. 1571-1576.
Heiji Watanabe et al., “Thermal Degradation of HfSiON Dielectrics Caused by TiN Gate Electrodes and Its Impact on Electrical Properties”, The Japan Society of Applied Physics, vol. 45, No. 4B, 2006, pp. 2933-2938.
Japanese Office Action in corresponding Application No. 2005-051340 dated Apr. 13, 2009, and an English Translation thereof.

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