Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material
Reexamination Certificate
2007-03-05
2010-06-08
Garber, Charles D (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Reexamination Certificate
active
07732314
ABSTRACT:
Methods for forming a metal diffusion barrier on an integrated circuit include at least four operations. The first operation deposits barrier material via PVD, ALD or CVD to provide some minimal coverage. The second operation deposits an additional barrier material and simultaneously etches a portion of the barrier material deposited in the first operation. The third operation deposits barrier material via PVD, ALD or CVD to provide some minimal coverage especially over the bottoms of unlanded vias. The forth operation deposits a metal conductive layer. Controlled etching is used to selectively remove barrier material from the bottom of vias, either completely or partially, thus reducing the resistance of subsequently formed metal interconnects. In addition, techniques to protect the bottoms of the unlanded vias are described.
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U.S. Office Action mailed on May 5, 2009 for U.S. Appl. No. 11/588,586.
U.S. O
Danek Michal
Rozbicki Robert
Garber Charles D
Novellus Systems Inc.
Stevenson André C
Weaver Austin Villeneuve & Sampson LLP
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