Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-08-12
2002-02-26
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S624000, C438S631000, C438S958000
Reexamination Certificate
active
06350673
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to the field of semiconductor manufacturing and more specifically to a method for decreasing CHC degradation.
BACKGROUND OF THE INVENTION
The operation of semiconductor devices, such as a transistor, requires for its operation the flow of carriers from a source to a drain. Any breakdown in that flow can degrade device performance. Device performance has been known to be degraded by a phenomenon commonly known as CHC (channel hot carrier) degradation.
In multilevel semiconductor devices, i.e., those that have multiple metal layers, CHC degradation can occur from a variety of causes. In a multilevel semiconductor device, a first metal layer is formed and covered by a dielectric. The dielectric then has photoresist placed on it and the entire device undergoes photolithography. The dielectric is then etched in areas where the photoresist was removed. During processing or handling, contaminates (such as water, sodium, ions, and metallics) can be introduced to the semiconductor device. During the lifetime of the semiconductor device, contaminants can migrate down through the semiconductor devices and degrade the operation of the semiconductor device.
One solution to this problem is to use a dense material for the dielectric. One proposed material is to use a silane based oxide. It is theorized that the dense nature of silane based oxide keeps contaminants from migrating through the semiconductor device, thus decreasing the chance of performance degradation.
Unfortunately, silane based oxides have several drawbacks. First, in order to form silane based oxides, silane gas must be used. Silane gas is very reactive and special facilities are required to handle it. Also, silane based oxides have a tendency to undergo “bread loafing,” or uneven application, which can result in voids in the dielectric.
Another way of reducing CHC degradation that has been proposed involves making the transition between the junction region under a gate and the junction region of the drain more gradual. This involves implanting the drain region multiple times using different dopants. This implantation is done with a mask in order to accurately dope the drain region. One drawback with this approach is that the process is very costly. Another drawback is that the procedure tends to decrease the distance between the source region and the drain region. To compensate for this, larger transistors are needed which leads to inefficient designs and higher manufacturing costs.
It has been theorized that contaminants migrate through the semiconductor device and encounter “dangling bonds”. Some dangling bonds are the result of incomplete bonding at the silicon/dielectric interface, the poly gate/dielectric interface, the poly gate/gate oxide interface, and/or the gate oxide/silicon interface. It is also theorized that if the bonds can be pacified, contaminants are less likely to combine with the dangling bonds and degrade the device.
Another theory concerning CHC degradation is that contaminants are small enough to diffuse through the semiconductor device and accumulate, leading to degradation of performance. It is theorized that heat can cause an added element to bond to the contaminant, thus rendering the contaminant too large to diffuse through the semiconductor device.
Whatever the exact mechanism of damage, what is needed is a method for preventing contaminants from causing CHC degradation.
SUMMARY OF THE INVENTION
Accordingly, it may be appreciated that a need has arisen for a method for decreasing CHC degradation in accordance with the teaching of present invention.
In one embodiment a method for decreasing CHC degradation is disclosed. The method includes providing a semiconductor device having at least one metal layer completed. Then a planarizing dielectric layer is added to the semiconductor device. The semiconductor device then undergoes a hydrogen treatment until hydrogen completely saturates the semiconductor device.
The present invention provides various technical advantages over current methods for decreasing CHC degradation. For example, one technical advantage is that the chemicals used are easy to handle. Another technical advantage is that CHC degradation is reduced in an efficient manner. Other technical advantages may be readily apparent to one skilled in the art from the following figures, descriptions, and claims.
REFERENCES:
patent: 5100817 (1992-03-01), Cederbaum et al.
patent: 5607773 (1997-03-01), Ahlburn et al.
patent: 5693961 (1997-12-01), Hamada
Harris George E.
Larkin David L.
Smith William D.
Brady III W. James
Lytle Craig P.
Smith Matthew
Texas Instruments Incorporated
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