Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2003-08-15
2008-12-16
Baker, Stephen M (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S795000, C714S796000
Reexamination Certificate
active
07467347
ABSTRACT:
A decoding method is provided which is capable of achieving decoding of error correcting codes in a simple configuration and in a short time. In the method of decoding error correcting codes to perform iterative decoding which consists of forward processing, backward processing, and extrinsic information value calculating, a backward processing path metric value obtained in the previous decoding iteration for a window boundary is used as an initial value of the backward processing path metric value for the window boundary in the next decoding iteration.
REFERENCES:
patent: 5185747 (1993-02-01), Farahati
patent: 5933462 (1999-08-01), Viterbi et al.
patent: 6393076 (2002-05-01), Dinc et al.
patent: 6477681 (2002-11-01), Taipale et al.
patent: 6510536 (2003-01-01), Crozier et al.
patent: 6718504 (2004-04-01), Coombs et al.
patent: 6732327 (2004-05-01), Heinila
patent: 6775801 (2004-08-01), Wolf et al.
patent: 6865712 (2005-03-01), Becker et al.
patent: 6996765 (2006-02-01), Wolf et al.
patent: 2002/0007474 (2002-01-01), Fujita et al.
patent: 2002/0015457 (2002-02-01), Obuchi et al.
patent: 2002/0095640 (2002-07-01), Arad et al.
patent: 2002/0118777 (2002-08-01), Blankenship et al.
patent: 2003/0084398 (2003-05-01), Nguyen
patent: 2003/0097630 (2003-05-01), Wolf et al.
patent: 2000-278144 (2000-10-01), None
patent: 2002-217745 (2002-08-01), None
patent: WO 01/54286 (2001-09-01), None
patent: WO 02/33834 (2002-04-01), None
“A Parallel MAP Algorighm for Low Latency Turbo Decoding” Yoon et al., IEEE Comminications Letters, vol. 6, No. 7, Jul. 2002, pp. 288-290.
“Improving the Max-log-MAP Turbo Decoder” Vogt et al., Electronics Letters, vol. 36, No. 23, Nov. 9, 2000.
“A DSP-Based Implementaion of a Turbo-Decoder” Blazek et al, IEEE vol. 5, 1998, pp. 2751-2755.
“State Vector Reduction for Initalizatio of Sliding Windows MAP” Dielissen et al., 2nd International Symposium on Turbo Codes & Related Topics, 2000, pp. 387-390.
“Soft-Output Decoding Algorithms for Continuous Decoding of Parallel Concatenated Convolutional Codes” Benedetto et al Proceeding of IEEE International Conference on Communications, pp. 112-117, 1996.
“VLSI Architectures for Turbo Codes” Masera, IEEE Transactions on VLSI System, pp. 369-379, 1999.
“An Intuitive Justification and a Simplified Implementation of the MAP Decoder for Convolutional Codes” Viterbi, IEEE Journal on Selected Areas on Communications, pp. 260-264, 1998.
Baker Stephen M
Hayes & Soloway P.C.
NEC Electronics Corporation
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