Method for data transfer for a semiconductor memory using combin

Details Method for data transfer for a semiconductor memory using combin Method for data transfer for a semiconductor memory using combin

1991-09-30

1994-10-18

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Signals

36523008, 365233, 365240, G11C 700

Patent

active

053574699

ABSTRACT:
In a method for data transfer between a plurality of memory cells and at least one input/output terminal of a semiconductor memory, and a semiconductor memory for carrying out the method, a memory cell address is defined by a control signal for a data transfer. A data transfer operation from or to the memory cells is controlled with an address control signal and an output enable control signal for defining a memory cell address with one of the two signals. A data transfer operation is subsequently initiated at a given logical linkage of the two control signals. An ensuing data transfer is controlled with the other of the two control signals.

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Publication: IEEE Journal of Solid-State Circuits, volume 24, No. 4, Aug. 1989, pp. 900-904.

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