Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-11-14
2006-11-14
Lindsay, Jr., Walter (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S672000, C438S629000
Reexamination Certificate
active
07135406
ABSTRACT:
Methods for forming openings in damascene structures, such as dual damascene structures are provided, using plug materials having varied etching rates. In one embodiment, a semiconductor substrate is provided with a low-k material layer formed thereabove, the low-k material layer having an upper surface and at least one via opening formed therethrough. A first plug material layer is formed over the low-k material layer and filled in the via opening, the first plug material layer having a first etching rate. The first plug material layer is etched back to form a first plug partially filling the via opening. A second plug material layer is formed over the low-k material layer and the first plug. The second plug material layer is etched back to form a second plug partially below the upper surface of the low-k material layer, the second plug material layer having a second etching rate higher than the first etching rate.
REFERENCES:
patent: 6488509 (2002-12-01), Ho et al.
Cheng Jye-Yen
Kao Ying-Jen
Lin Jian-Hong
Birch & Stewart Kolasch & Birch, LLP
Lindsay, Jr. Walter
Taiwan Semiconductor Manufacturing Co. Ltd.
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