Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2002-07-08
2004-11-02
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S466000, C438S486000
Reexamination Certificate
active
06812072
ABSTRACT:
This application claims the benefit of Korean Application No. P2001-41378 filed on Jul. 10, 2001, which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for crystallizing an amorphous film, and more particularly, to a method for crystallizing an amorphous film for enhancing a crystallinity, and a method for fabricating a liquid crystal display device (LCD) by using the same.
2. Background of the Related Art
As devices become larger, and more integrated, switching devices become thinner, and as a consequence the present amorphous silicon thin film transistors are replaced with polycrystalline thin film transistors.
With a process temperature below 350° C., though the amorphous silicon thin film transistor can be fabricated on a glass substrate with ease, it is difficult to employ the amorphous silicon thin film transistor in a fast operation circuit due to low mobility.
However, as the polycrystalline silicon has a higher mobility than amorphous silicon, a driving circuit can be fabricated on a glass substrate. Therefore, the polycrystalline silicon is favored as a switching device of a high resolution, large sized device.
The polycrystalline silicon may be formed by direct deposition of the polycrystalline silicon, or crystallizing amorphous silicon after the amorphous silicon is deposited. The latter method includes Solid Phase Crystallization (SPC), Excimer Laser Annealing (ELA), Metal Induced Crystallization (MIC), and the like.
A high crystallization temperature and a long heat treatment time period are characteristics of the SPC method. SPC is comparatively simple since it only requires a long time period of heat treatment in a furnace where temperature is more than 600° C. for forming the polycrystalline film. SPC has disadvantages in that fabrication of a device by SPC is difficult because SPC causes many defects inside the crystallized grains, and the glass substrate cannot be used due to the high crystallizing temperature.
ELA, in which an excimer laser with a short wave length and a high energy is irradiated momentarily for crystallizing a thin film, facilitates a low temperature crystallization at a temperature below 400° C., and produces a large sized grain with excellent properties. However, since ELA progresses non-uniform crystallization and requires expensive equipment, ELA is not suitable for mass production and fabrication of large sized devices.
MIC, introduced through research for decreasing the crystallization temperature, facilitates crystallization at a temperature below 500° C., and is favored for fabrication of a large sized LCD.
Field Enhanced-Metal Induced Crystallization (FE-MIC) is a developed form of MIC for crystallizing at a low temperature by using catalytic metal in an electric field. In the development of FE-MIC, the crystallization temperature of a thin film decreases significantly when a metal impurity is added to an amorphous silicon film because free electrons of the metal decreases a bonding energy of the silicon due to an action of the free electrons of the metal.
FE-MIC is favored in large sized glass substrate applications because crystallization time is shortened and the crystallization temperature decreases significantly compared to present MIC when an electric field is applied to the amorphous silicon film having a catalytic metal contained therein. In general, FE-MIC is influenced by an amount of the catalytic metal; the more the catalytic metal, the lower the crystallization temperature.
The steps of a related art method for crystallizing an amorphous film, and the steps of a related art method for fabricating an LCD by using the same will be explained, with reference to the attached drawings.
FIGS. 1A-1C
illustrate the steps of a related art method for crystallizing an amorphous silicon film. First, the steps of a related art method for crystallizing an amorphous film will be explained.
Referring to
FIG. 1A
, a buffer layer
2
is formed on a substrate
1
, and amorphous silicon is deposited thereon at 300-400° C. by Plasma Enhanced CVD (PECVD), Low-Pressure CVD (LPCVD) using silane gas or by sputtering to form an amorphous silicon thin film
3
. The buffer layer
2
prevents impurities in the substrate
1
from diffusing into the amorphous silicon thin film
3
, and cuts off a thermal flow to the substrate
1
in a later crystallization.
Next, referring to
FIG. 1B
, a metal, such as nickel, is deposited on the amorphous thin film
3
by using plasma of non-reactive gas to form a catalytic metal layer
4
.
Then, referring to
FIG. 1C
, electrodes
5
are provided at opposite ends of the catalytic metal layer
4
, and an electric field is applied thereto, to activate free electrons of the catalytic metal layer
4
. Then, the bonding energy of silicon is decreased by the free electron of the nickel atoms, to decrease the crystallization temperature, and the nickel atoms are diffused into the silicon thin film to form nickel silicide. The nickel atom acts as a seed of the crystallization.
In the crystallization of the amorphous silicon by using the nickel silicide, a needle-like form of crystalline grain phase grows in the <111>orientation direction because of the nickel silicide.
Thus, the amorphous silicon thin film
3
on the substrate
1
is crystallized into a polycrystalline silicon thin film. FE-MIC shortens crystallization time, and decreases the crystallization temperature compared to existing MIC, when the electric field is applied to the amorphous silicon thin film. FE-MIC provides a fast crystallization rate, low cost, and provides the possibility for large sized glass substrate applications.
Devices with high mobility can be fabricated if the foregoing method for crystallizing an amorphous film is applied to a semiconductor device, an LCD, or the like.
The step of the related art method for fabricating an LCD by using the FE-MIC will be explained.
First, a buffer layer is formed of a silicon oxide on a thin film array substrate, and an amorphous silicon thin film is formed thereon. An electric field is applied to the amorphous silicon thin film while heating the amorphous silicon thin film, to crystallize the amorphous silicon thin film into a polycrystalline silicon thin film.
Next, the polycrystalline silicon thin film is patterned, to form an active semiconductor layer, and silicon nitride SiNx is deposited on an entire surface including the semiconductor layer, to form a gate insulating film.
Then, a low resistance metal film is deposited on the gate insulating film, patterned by photolithography, to form a gateline and a gate electrode, and impurities are injected into the semiconductor layer with the gate patterns used as mask, to form source/drain regions.
Next, source/drain electrodes are formed for connecting the dataline perpendicular to the gateline to the source/drain regions. The data patterns are insulated form the gate patterns by an interlayer insulating film.
Then, a protection film is formed on an entire surface including the source/drain electrodes, and a pixel electrode is formed connected to the drain electrode through the protection film, thereby completing fabrication of an array substrate of an LCD.
When a color filter substrate with a color filter layer and a common electrode is bonded to the thin film array substrate, and a liquid crystal layer is formed between the two substrates, the LCD is formed.
However, the related art method for crystallizing an amorphous film, and a method for fabricating an LCD by using the same have the following problems.
That is, FE-MIC shows a trend that the greater the amount of the catalytic metal, the lower the crystallization temperature. However, the increased amount of the catalytic metal impedes an adequate growth of the crystalline grain, and causes a current leakage due to remaining catalytic metal. For applications to a large sized device, it is very important that the amount of metal, employed in the crystallization
Jang Jin
Kim Ah Young
Kim Kyung Ho
Coleman W. David
LG. Philips LCD Co. Ltd.
McKenna Long & Aldridge LLP
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