Method for creating mask pattern for circuit fabrication and...

Details Method for creating mask pattern for circuit fabrication and... Method for creating mask pattern for circuit fabrication and...

2006-03-07

2006-03-07

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C719S323000

Reexamination Certificate

active

07010775

ABSTRACT:
A method for creating mask pattern data for fabricating a circuit includes the steps of dividing original mask pattern data into a plurality of regions having a first size; performing OPC on the plurality of regions and creating first mask pattern data based on the plurality of processed regions; dividing the original mask pattern data into a plurality of regions having a second size; performing OPC on the plurality of regions and creating second mask pattern data based on the plurality of processed regions; and when no non-matching data is present as a result of matching comparison, setting the first or second mask pattern data as the mask pattern data for fabricating the circuit; and when non-matching data is present as a result of the comparison, deleting the non-matching data from the first or second mask pattern data so as to create the mask pattern data for fabricating the circuit.

REFERENCES:
patent: 5879844 (1999-03-01), Yamamoto et al.
patent: 6057063 (2000-05-01), Liebmann et al.
patent: 6077310 (2000-06-01), Yamamoto et al.
patent: 2003/0163791 (2003-08-01), Falbo et al.
patent: 11-174659 (1999-07-01), None

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