Method for creating derivative integrated circuit layouts...

Details Method for creating derivative integrated circuit layouts... Method for creating derivative integrated circuit layouts...

2005-07-26

2005-07-26

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06922823

ABSTRACT:
A method for creating a derivative semiconductor design layout is disclosed. The method generally comprises the steps of (A) receiving a plurality of changes from a user for a first layout of a semiconductor design having a plurality of first layers, (B) storing the changes in a plurality of second layers and (C) displaying the derivative semiconductor design layout to the user in response to logically operating on the first layers and the second layers.

REFERENCES:
patent: 6370679 (2002-04-01), Chang et al.
patent: 6453454 (2002-09-01), Lee et al.
patent: 2003/0184585 (2003-10-01), Lin et al.
patent: 2004/0066363 (2004-04-01), Yamano et al.

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