Method for coupling substrates and structure

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support

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438106, 438118, 438127, H01L 2144, H01L 2148, H01L 2150

Patent

active

060227613

ABSTRACT:
A method for connecting substrates includes using an adhesive interposer structure (11) to bond a semiconductor device (26) to a substrate (18). The adhesive interposer structure (11) includes a non-conductive adhesive laminant (12) and conductive adhesive bumps (13). The conductive adhesive bumps (13) provide a conductive path between conductive bumps (27) on the semiconductor device (26) and conductive metal pads (21) located on the substrate (18). In an alternative embodiment, a conductive adhesive material (34) is screen or stencil printed into vias (39) located on a printed circuit board (38) to form conductive adhesive bumps (33). A non-conductive adhesive (52) is then screen or stencil printed onto the printed circuit board (38) adjacent the conductive adhesive bumps (33). A semiconductor die is then connected to the structure.

REFERENCES:
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patent: 4427715 (1984-01-01), Harris
patent: 4774633 (1988-09-01), Dehaine et al.
patent: 5014111 (1991-05-01), Tsuda et al.
patent: 5074947 (1991-12-01), Estes et al.
patent: 5311396 (1994-05-01), Steffen
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patent: 5849609 (1998-12-01), Chun
patent: 5875545 (1999-03-01), DiStefano et al.
"Area Bonding Conductive Epoxy Adhesives for Low Cost Grid Array Chip Carriers", Justin C. Bolger and John M. Czarnowski, International Electronics Mfg. Symposium, Austin, TX, Oct. 2-4, 1995.
Patent Abstracts of Japan, vol. 009, No. 110 (E-314), May 15, 1985 & JP 60001849 A (Sharp KK), Jan. 8, 1985.

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