Electrical computers and digital processing systems: processing – Processing control – Processing sequence control
Reexamination Certificate
2008-07-15
2008-07-15
Pan, Daniel (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Processing sequence control
C712S219000, C712S227000, C712S244000
Reexamination Certificate
active
09751762
ABSTRACT:
In a multi-threaded processor, a long latency data dependent thread is flushed from the execution pipelines. Once the stalled thread is flushed, the non-stalling threads in the pipeline can continue their execution. Several resources are used to reduce this unwanted impact of stalls on the non-stalling threads. Also, these resources ensure that the earlier stalled thread, now flushed, is re-executed when the data dependency is resolved.
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Computer Organization and Design—The Hardware/Software Interface, John L. Hennessy and David A. Patterson, Morgan Kaugmann Publishers, 2nd Edition, 1998, p. 505.
Kottapalli Sailesh
Walterscheidt Udo
Intel Corporation
Kenyon & Kenyon LLP
Pan Daniel
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