Method for controlling timing between video decoding and display

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Patent

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Details

3488451, 348416, H04N 712, H04N 1102, H04N 1104

Patent

active

061413836

ABSTRACT:
A method and apparatus are provided for controlling the timing between video decoding and video displaying. The apparatus contains a video decoder for decoding a B picture included in an input video bitstream, on the basis of previous and following I and P pictures, a memory for storing the decoded B picture by one frame, and a decoding controller for comparing the amount of data displayed with the amount of data decoded while outputting the decoded B picture stored in the memory, and controlling decoding of a subsequent B picture to prevent the decoding from overlapping with the displaying. In the apparatus, although the memory space for B picture storage is set as one frame, the decoding of a picture is prevented from overlapping with the displaying thereof. Thus, decoding efficiency is not lessened even though a memory of two frame size is not employed.

REFERENCES:
patent: 5293229 (1994-03-01), Iu
patent: 5504530 (1996-04-01), Obikane et al.
patent: 5510840 (1996-04-01), Yonemitsu
patent: 5561465 (1996-10-01), Fautien et al.
patent: 5574504 (1996-11-01), Yagasaki et al.

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