Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Patent
1998-12-10
1999-11-23
Fahmy, Wael M.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
438714, 438724, 438734, 438744, 218 67, 218 72, H01L 2176
Patent
active
059899794
ABSTRACT:
A novel anisotropic plasma etching process for forming patterned silicon nitride (Si.sub.3 N.sub.4) layers with improved critical dimension (CD) control while minimizing the Si.sub.3 N.sub.4 footing at the bottom edge of the Si.sub.3 N.sub.4 pattern is achieved. A pad oxide/silicon nitride layer is deposited on a silicon substrate. A patterned photoresist layer is used as an etching mask for etching the silicon nitride layer. By this invention, a chlorine (Cl.sub.2) breakthrough plasma pre-etch forms a protective polymer layer on the sidewalls of the patterned photoresist and removes residue in the open areas prior to etching the Si.sub.3 N.sub.4. The Si.sub.3 N.sub.4 is then aniso-tropically plasma etched using an etch gas containing SF.sub.6. The polymer layer, formed during the Cl.sub.2 pre-etch, reduces the lateral recessing of the photoresist when the Si.sub.3 N.sub.4 is etched, and results in improved patterned Si.sub.3 N.sub.4 profiles with reduced CD bias, and minimizes Si.sub.3 N.sub.4 footings at the bottom edge of the Si.sub.3 N.sub.4 pattern.
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Lee Pei Ching
Liu Wen Jun
Zhou Mei Sheng
Chartered Semiconductor Manufacturing Ltd.
Fahmy Wael M.
Pham Long
Pike Rosemary L. S.
Saile George O.
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