Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2006-10-17
2006-10-17
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S300000, C713S323000, C713S324000
Reexamination Certificate
active
07124311
ABSTRACT:
In a system large scale integrated circuit (LSI) according to one embodiment, management of the power supply, and the like, of a dedicated instruction processor can be carried out according to an instruction issued to a basic instruction processor at high speed. Further, the operational state of a dedicated instruction processor may be readily obtained by a basic instruction processor. In such a system LSI, a system controller (14) can include an instruction decoder (16) that decodes an instruction fetched by a basic instruction processor (11) and generates a decoder output. Such a decoder output can control a second power supply controlling unit (51), a second clock signal generating unit (52), a second program counter (53), and a second conditional flag (54) for a dedicated instruction processor (12).
REFERENCES:
patent: 5204957 (1993-04-01), Wilkie et al.
patent: 5495617 (1996-02-01), Yamada
patent: 5724599 (1998-03-01), Balmer et al.
patent: 2002/0050998 (2002-05-01), Sasaki
patent: 2005/0197880 (2005-09-01), Walsh et al.
patent: 2005/0220109 (2005-10-01), Sudo et al.
patent: 1 160 697 (2001-12-01), None
patent: 1 160 697 (2003-04-01), None
patent: 63-247861 (1988-10-01), None
patent: 04-175974 (1992-06-01), None
patent: 09-138716 (1997-05-01), None
patent: 2000-235489 (2000-08-01), None
European Search Report of Dec. 23, 2004.
CoWare, Inc.,Flexible Platform-Based Design With the CoWare N2CTM Design System, Oct. 2000, pp. 1-9.
Arnout, Guido,C for System Level Design, 1999, pp. 1-4.
SystemC.org,Overview of the Open SystemC Initiative, 1999, pp. 1-2.
Nishitani, Takao,An Approach to a Multimedia System on a Chip, 1999, pp. 13-22.
Suzuki et al.,A Rapid Prototyping Method for Top-down Design of System-on-Chip Devices Using LPDAs, 1997, pp. 9-14.
Khare et al.,V-SAT: A Visual Specification and Analysis Tool for System-on-Chip Exploration, Apr. 2001, pp. 263-275.
Ernst, et al.,Hardware-Software Cosynthesis for Microcontrollers, 1993, pp. 64-75.
Cesario, et al.,An XML-based Meta-model for the Design of Multiprocessor Embedded Systems, Oct. 2000, pp. 75-82.
Jozwiak, Lech,Quality-driven Design in the System-on-a-Chip Era: Why and How?, Apr. 2001, pp. 201-224.
Japanese Patent Office Action of Oct. 31, 2005.
English Translations of the indicated portions of the above-referenced Japanese Office Action.
Cribbs Malcolm
Lee Thomas
NEC Electronics Corporation
Sako Bradley T.
Walker Darryl G.
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