Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2000-02-09
2002-03-26
Fahmy, Wael (Department: 2822)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S778000, C438S780000
Reexamination Certificate
active
06362116
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to wafer fabrication processes, and, more particularly, to a method and apparatus for controlling a photoresist baking process of a wafer during fabrication thereof.
2. Description of the Related Art
Conventionally, semiconductor devices are patterned using photolithographic processes. A base material, such as a substrate material, a metal, an insulator, etc., is coated with a light sensitive material, referred to as photoresist. The photoresist is generally sensitive to active rays of light, such as ultraviolet rays, X-rays or electron rays. The photoresist is deposited on the base material to selectively protect non-process portions of the substrate. Light is then selectively directed onto the photoresist film through a photomask, or reticle, to form photoresist patterns on the base material. The photoresist is then developed to remove either the exposed photoresist or the unexposed photoresist.
There are generally two types of photoresist, namely a positive type and a negative type. The positive photoresist is the type where the exposed portion dissolves in the developer, while the unexposed portion does not dissolve. The negative photoresist, on the other hand, is of the opposite type. Certain photoresist materials do not complete the transition from being soluble to being insoluble in the developer based solely on the exposure to light. These photoresist materials, referred to as chemically-amplified photoresists, are subjected to a post exposure bake process to complete the transition from soluble to insoluble (i.e., for a positive resist).
The process of using a chemically-amplified photoresist is described in greater detail in reference to
FIGS. 1A through 1D
.
FIG. 1A
shows a cross-sectional view of a wafer
10
including a base material
12
with a photoresist layer
14
deposited thereon. In
FIG. 1B
, the photoresist layer
14
is exposed to a light source through a photomask (not shown) to define exposed regions
16
. Exposure to the light causes hydrogen free radicals to form in the exposed regions
16
, which are on the surface of the photoresist layer
14
. In
FIG. 1C
, the wafer
10
is subjected to a post exposure bake to complete the solubility transition chemical reaction and form baked regions
18
. During the post exposure bake, the free radicals diffuse downward and react with the photoresist
14
beneath the exposed regions
16
. Typically, for a deep ultraviolet photoresist layer
14
, the post exposure bake time is about 60-90 seconds. As shown in
FIG. 1D
, a developer may then be applied to remove the remaining photoresist
14
(i.e., for a negative resist—shown in
FIG. 1D
) or to remove the baked portions
18
(ie., for a positive resist—not shown). The wafer
10
is then put through an ultraviolet (UV) baking process to further increase the resistivity of the photoresist
14
to any subsequent etching performed on the wafer
205
. The remaining photoresist (ie., in the baked regions
18
) is stripped using a process such as a plasma etch or a wet etch. A plasma strip tool uses plasma-enhanced, ionized oxygen/oxygen radicals. A wet etch tool typically uses sulfuric acid/peroxide mixes followed by rinses or a sequence of standard cleans.
The ultraviolet baking process is an important step in photolithography because it increases the cross-linking in the photoresist layer. As the amount of this cross-linking increases, the resistance to etching of the photoresist also increases, which is desirable for subsequent etching processes that are performed on the wafer. In addition to the cross-linking of bonds, the ultraviolet bake process also removes additional solvents from the photoresist layer, thereby further increasing its resistance to etching. As the photoresist material becomes more resistant to the etching process, however, it makes stripping off the photoresist more difficult to achieve. Accordingly, it is desirable for the photoresist to provide enough resistance to etching, yet not so much cross-linkage that the subsequent photoresist stripping process is difficult to achieve.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method is provided for baking a wafer, with the wafer having a layer of photoresist thereon. A first thickness of the photoresist layer is measured, and a first fourier transform infrared (FTIR) spectra of the photoresist layer is generated. Based on the first thickness and first FTIR spectra, a bake time and bake temperature is determined. The wafer is then baked at the bake temperature for the bake time.
In another aspect of the present invention, an apparatus is provided for baking a wafer, where the wafer has a layer of photoresist thereon. The apparatus comprises an ellipsometer adapted to measure a first thickness of the photoresist layer and, a fourier transform infrared (FTIR) spectroscopy unit adapted to generate a FTIR spectra of the photoresist layer. A controller is also provided and adapted to determine a bake time and bake temperature based on the first thickness and first FTIR spectra. A bake unit is also provided and adapted to bake the wafer at the bake temperature for the bake time.
REFERENCES:
patent: 4977330 (1990-12-01), Batchelder et al.
patent: 5352326 (1994-10-01), Cywar et al.
patent: 6026688 (2000-02-01), Khuri-Yakub et al.
patent: 6127098 (2000-10-01), Nakagawa et al.
patent: 08 304033 (1996-11-01), None
Thomas E. Metz et al. “In-situ Film Thickness Measurements for Real-Time Monitoring and Control of Advanced Photoresist Track Coating Systems”, SPIE vol. 1594, 1991, pp. 146-152.*
Takeshi et al. (JP 08-304033), Translation.*
Croffie E et al., “Overview of the Storm Program Application to 193 nm Single Layer Resists” Microelectronic Engineering, vol. 53, No. 1-4, Jun. 1-30, 2000, pp. 437-442, XP001001580 p. 437, paragraph 1—p. 442, col. 2, paragraph 1.
International Search Report dated Jul. 18, 2001 (PCT/US 01/01524; TT3301-PCT).
Advanced Micro Devices , Inc.
Fahmy Wael
Guerrero Maria
Williams Morgan & Amerson
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