Method for controlling etch bias in plasma etch patterning of in

Details Method for controlling etch bias in plasma etch patterning of in Method for controlling etch bias in plasma etch patterning of in

1996-06-10

1998-03-10

Breneman, R. Bruce

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438720, 438725, 430313, 430317, 430318, H01L 2100

Patent

active

057261024

ABSTRACT:
A method for controlling the plasma etch bias of a patterned layer formed through plasma etching of a blanket layer formed beneath a patterned photoresist layer. There is first formed upon a semiconductor substrate a blanket layer. Formed upon the blanket layer is a patterned photoresist layer. The patterned photoresist layer is then treated through a pre-treatment method to form with a controlled degradation and a controlled flow a hardened patterned photoresist layer from the patterned photoresist layer. The hardened patterned photoresist layer is hardened against a further flow in a subsequent plasma etch method which is employed in etching the patterned layer from the blanket layer while employing the hardened patterned photoresist layer as an etch mask. Finally, the blanket layer is etched through the subsequent plasma etch method to form the patterned layer while employing the hardened patterned photoresist layer as the etch mask.

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patent: 5219788 (1993-06-01), Abernathey et al.
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