Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-12-14
2003-11-04
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06643828
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to the design of integrated circuits, and more particularly, to controlling the design of critical circuits that are used in microprocessor and other very large scale integrated (VLSI) circuits.
Microprocessor circuits as well as other VLSI circuits often have particular circuits which are difficult to design correctly, and are therefore deemed to be critical. These types of circuits can include latches, clock generators and specialized logic, such as CAMs, pseudo-NMOS and the like. To meet the relentless performance goals for such VLSI chips, such circuits are necessarily used over large parts of the chips. The particular configuration of each circuit often has to be custom tailored to satisfy the needs of its application in different areas or blocks on the chip. This custom tailoring is very costly in terms of circuit design investment and also in terms of risk to the design, for the reason that it is difficult to assure reliability of the functionality of such critical circuits. This is because there is an increased probability that a designer will introduce an error that will damage the chip functionality with each modification that is made.
Virtually all VLSI designs make use of what is called a “library” of circuits that designers can draw on to implement their logic functions or blocks. These circuits are generally completely fixed, unchangeable quantities that are used as is. There are prior art designs that have made use of some “stretchable” library circuits that allow designers to increase or reduce the size of the circuit based on delay or area requirements. While this can aid the designer in some instances, it is not sufficient to ensure proper functioning of a critical circuit, since fixed sizes, delays and other aspects of these circuits need to be maintained.
Thus, there is a need to provide the performance and density advantages of these critical circuits to the design and control the engineering investment and risk involved in implementing them across the diverse applications on the chip.
SUMMARY OF THE INVENTION
The present invention comprises a method of providing critical circuits in a library whereby such critical circuits allow designers to apply modifications to them in a controlled manner such that the changes are easy to implement and are assured to be correct. The invention comprises a method of performing limited modifications to one or more critical circuits in a controlled manner, and thereafter checking the resulting modified circuit with a circuit simulator for conformance to predetermined specifications that have been assembled for this library critical circuit.
REFERENCES:
patent: 5802349 (1998-09-01), Rigg et al.
patent: 6470482 (2002-10-01), Rostoker et al.
A. Howard, “An Integrated EDA—Tools Flow Improves Designers' Productivity; an Integrated Front-to-Back Design Flow Improves Quality and Efficiency in the Design of a Prescaler”, EDN, vol. 47, No. 12, May 30, 2002, pp. 65-69, and Dialog Accession No. 02616033.
Kever Wayne D.
Naffziger Samuel D.
Do Thuan
Hewlett--Packard Development Company, L.P.
Smith Matthew
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