Method for controlling an external memory for a CD-ROM decoder a

Details Method for controlling an external memory for a CD-ROM decoder a Method for controlling an external memory for a CD-ROM decoder a

1996-12-30

1998-09-29

Butler, Dennis M.

395559, G06F 104

Patent

active

058156917

ABSTRACT:
A method and apparatus for controlling an external memory for a CD-ROM decoder capable of smoothly performing subcode storage, read and write operations of microcomputer data, and a refresh cycle in the case where the external memory is a DRAM, without having an influence on fundamental CD-ROM decoder functions such as error correction, buffering and pickup data transmission to a host. The CD-ROM decoder includes a byte clock and master clock. The method includes outputting the byte clock upon an occurrence of six periods of the master clock, wherein the byte clock and the master clock each have first and second levels; allotting a portion of a first period of the master clock having the first level for performing a buffering operation; allotting a portion of a second period of the master clock having the first level for performing one of a refresh cycle operation, a subcode storage operation, and data read and write operations of the CD-ROM controlling microcomputer with respect to the external memory; allotting a portion having the first level of the third through sixth periods of the master clock for performing an error correction operation; allotting a portion having the second level of the first through sixth periods of the master clock for transmission to the host of the picked-up CD-ROM data, whereby the external memory is accessed.

REFERENCES:
patent: 5640383 (1997-06-01), Kamoto et al.
patent: 5694383 (1997-12-01), Arataki et al.

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