Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2011-03-01
2011-03-01
Phan, Trong (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S230030, C365S230060, C365S230080, C365S240000
Reexamination Certificate
active
07898883
ABSTRACT:
A memory access control method is provided. By decoding a read-write command, a mode register set (MRS) signal is generated. When the MRS signal is enabled, a latch outputs a bank-select signal. The bank-select signal is then decoded to generate a register-select signal. Then, an address signal is written into a register selected by the register-select signal. The value of a certain register can be used to determine whether to enable the error check function. Thus, the next generation memory structure with the CRC function can be compatible with the conventional memory structure.
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Liu Wei-Li
Nin Shu-Liang
Jianq Chyun IP Office
Nanya Technology Corporation
Phan Trong
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