Method for controlling a central processing unit for...

Details Method for controlling a central processing unit for... Method for controlling a central processing unit for...

2006-06-13

2006-06-13

Anderson, Matthew D. (Department: 2186)

Electrical computers and digital processing systems: memory

Address formation

Varying address bit-length or size

C711S213000, C711S002000, C711S220000

Reexamination Certificate

active

07062632

ABSTRACT:
The present invention is based on the finding that free CPU operation code identifiers of a CPU or CPU operation code identifiers useable for any reason can be used to control supporting means upstream of the CPU, which is able to form, responsive to these operation code identifiers, a new, for example, physical address in relation to a second memory area having a second memory which is larger than the, for example, logic memory size addressable by the CPU. By means of the special operation code identifiers, it is thus possible in the course of an executable machine code to address the supporting means which monitors the data traffic via which the operation codes to be processed or the operation code identifiers are provided to the CPU, from the memory to the CPU, and which can take measures in relation to the new formed address when certain special operation code identifiers occur. In this way, on the one hand, a complicated redesign of the CPU and, on the other hand, the necessity of a software-resetting of the current memory window complicated as regards both the executable machine code and the processing speed are avoided.

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