Method for comparing two designs of electronic circuits

Details Method for comparing two designs of electronic circuits Method for comparing two designs of electronic circuits

2007-01-11

2009-06-09

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07546565

ABSTRACT:
A method implemented as a computer program product for comparing two designs of electronic circuits, wherein the design representations comprise several hierarchically related sheets. The method comprises the steps of (a) identifying corresponding top-sheets of the first hierarchy level in the design versions; (b) generating a list of all sub-sheets for each top-sheet and comparing the lists to identify added, removed and common sheets of the corresponding top-sheets; (c) defining the common sheets as corresponding top-sheets of a next hierarchy level; and (d) repeating steps (a)-(c) until at least one of the top-sheets does not comprise any sub-sheet.

REFERENCES:
patent: 6668362 (2003-12-01), McIlwain et al.
patent: 2005/0091627 (2005-04-01), Satapathy et al.
patent: 2005/0172245 (2005-08-01), Anderson
patent: 2006/0200789 (2006-09-01), Rittman
Batra, P et al. “Hcompare: A Hierarchical Netlist Comparison Program”, 29th ACM/IEEE Design Automation Conference, Jun. 8-12, 1992, pp. 299-304.
“Hcompare: A Hierarchical Netllst Comparison Program”, P. Batra et al., 29th ACM/IEEE Design Automation Conference, pp. 299-304, 1992.
“Hierarchical LVS Based on Hierarchy Rebuilding” by Wonjong Kim and Hyunchul Shin, Design Automation Conference 1998, ISBN: 0-7803-4425-1, Feb. 10-13, 1998, pp. 379-384.

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