Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-09-05
1999-10-26
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
G06F 1100
Patent
active
059745738
ABSTRACT:
A method for operating a computer system and an associated method for collecting information related to the operation of the computer system. An ECC count and a series of address/time/temperature entries is maintained in a memory of the computer system. The computer system is continuously monitored for occurrences of an SMM event. Upon detection of an SMM event, the computer system enters SMM mode where SMM handler code is executed until handling of the SMM event is complete. The SMM handler code includes special instructions which enable the collection of information related to the operation of the computer system. Specifically, a determination is made as to whether the SMM event was caused by an ECC event. If so, the address at which the ECC event occurred and the time and temperature when the ECC event occurred are acquired, the ECC count is incremented and the acquired address, time and temperature information is stored as an entry in the memory.
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Beausoliel, Jr. Robert W.
Dell USA L.P.
Elisca Pierre E.
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