Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Patent
1999-06-25
2000-06-27
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
438906, 438928, H01L 21311, H01L 213213
Patent
active
060806753
ABSTRACT:
A method for manufacturing a semiconductor device on a wafer that has a substrate with a front side and a backside, and an accumulation of waste matter on the backside of the substrate. In a method of the invention, a covet layer is deposited over the front side in a normal coating step of a process for fabricating a component on the wafer. The cover layer provides material used in the process for fabricating the component on the front side of the wafer and creates a barrier over the front side. The waste matter is removed from the backside of the wafer by etching the waste matter from the backside of the wafer with a suitable etchant, or by planarizing the backside of the wafer with a chemical-mechanical planarization ("CMP") process. During the removal step, the cover layer protects the front side and any device features on the front side from being damaged while the waste matter is removed from the backside of the wafer. Since the cover layer is deposited in a normal coating step of the process for fabricating a component on the wafer, it is deposited irrespective of whether the waste matter is removed from the wafer.
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Blalock Guy
Prall Kirk
Champagne Donald L.
Micro)n Technology, Inc.
Utech Benjamin L.
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